codegenwasm.cpp

// Licensed to the .NET Foundation under one or more agreements.
// The .NET Foundation licenses this file to you under the MIT license.

#include "jitpch.h"
#ifdef _MSC_VER
#pragma hdrstop
#endif

#include "codegen.h"
#include "regallocwasm.h"
#include "fgwasm.h"
#include "gcinfo.h"
#include "gcinfoencoder.h"

static const int LINEAR_MEMORY_INDEX = 0;

#ifdef TARGET_64BIT
static const instruction INS_I_load  = INS_i64_load;
static const instruction INS_I_store = INS_i64_store;
static const instruction INS_I_const = INS_i64_const;
static const instruction INS_I_add   = INS_i64_add;
static const instruction INS_I_and   = INS_i64_and;
static const instruction INS_I_or    = INS_i64_or;
static const instruction INS_I_shl   = INS_i64_shl;
static const instruction INS_I_eqz   = INS_i64_eqz;
static const instruction INS_I_mul   = INS_i64_mul;
static const instruction INS_I_sub   = INS_i64_sub;
static const instruction INS_I_le_u  = INS_i64_le_u;
static const instruction INS_I_ge_u  = INS_i64_ge_u;
static const instruction INS_I_gt_u  = INS_i64_gt_u;
#else  // !TARGET_64BIT
static const instruction INS_I_load  = INS_i32_load;
static const instruction INS_I_store = INS_i32_store;
static const instruction INS_I_const = INS_i32_const;
static const instruction INS_I_add   = INS_i32_add;
static const instruction INS_I_and   = INS_i32_and;
static const instruction INS_I_or    = INS_i32_or;
static const instruction INS_I_shl   = INS_i32_shl;
static const instruction INS_I_eqz   = INS_i32_eqz;
static const instruction INS_I_mul   = INS_i32_mul;
static const instruction INS_I_sub   = INS_i32_sub;
static const instruction INS_I_le_u  = INS_i32_le_u;
static const instruction INS_I_ge_u  = INS_i32_ge_u;
static const instruction INS_I_gt_u  = INS_i32_gt_u;
#endif // !TARGET_64BIT

//------------------------------------------------------------------------
// ensureCurrentFuncIsUnwindable: ensure we set up an unwindable frame
//    for the current function or funclet.
//
void CodeGen::ensureCurrentFuncIsUnwindable()
{
    FuncInfoDsc* const func = m_compiler->funCurrentFunc();
    func->ensureUnwindableFrame(m_compiler);
}

//------------------------------------------------------------------------
// GetStackPointerRegIndex: get the Wasm local index for the stack pointer
//
unsigned CodeGen::GetStackPointerRegIndex() const
{
    regNumber spReg = GetStackPointerReg(m_compiler->funCurrentFuncIdx());
    assert(spReg != REG_NA);
    return WasmRegToIndex(spReg);
}

//------------------------------------------------------------------------
// GetFramePointerRegIndex: get the Wasm local index for the frame pointer
//
unsigned CodeGen::GetFramePointerRegIndex() const
{
    regNumber fpReg = GetFramePointerReg(m_compiler->funCurrentFuncIdx());
    assert(fpReg != REG_NA);
    return WasmRegToIndex(fpReg);
}

//------------------------------------------------------------------------
// genMarkLabelsForCodegen: mark labels for codegen
//
void CodeGen::genMarkLabelsForCodegen()
{
    assert(!m_compiler->fgSafeBasicBlockCreation);

    JITDUMP("Mark labels for codegen\n");

#ifdef DEBUG
    // No label flags should be set before this.
    for (BasicBlock* const block : m_compiler->Blocks())
    {
        assert(!block->HasFlag(BBF_HAS_LABEL));
    }
#endif // DEBUG

    // Mark all the funclet boundaries.
    //
    for (FuncInfoDsc* const func : m_compiler->Funcs())
    {
        BasicBlock* const firstBlock = func->GetStartBlock(m_compiler);
        firstBlock->SetFlags(BBF_HAS_LABEL);

        JITDUMP("  " FMT_BB " : %s begin\n", firstBlock->bbNum, (func->funKind == FUNC_ROOT) ? "method" : "funclet");
    }
}

//------------------------------------------------------------------------
// genBeginFnProlog: generate wasm local declarations
//
void CodeGen::genBeginFnProlog()
{
    GetEmitter()->emitIns(INS_code_size);

    FuncInfoDsc* const func = m_compiler->funGetFunc(ROOT_FUNC_IDX);
    assert(func->funWasmLocalDecls != nullptr);

    unsigned localsCount = 0;
    assert(m_compiler->funCurrentFuncIdx() == 0);
    GetEmitter()->emitIns_I(INS_local_cnt, EA_8BYTE, func->funWasmLocalDecls->size());
    for (FuncInfoDsc::WasmLocalsDecl& decl : *func->funWasmLocalDecls)
    {
        GetEmitter()->emitIns_I_Ty(INS_local_decl, decl.Count, decl.Type, localsCount);
        localsCount += decl.Count;
    }
}

//------------------------------------------------------------------------
// genPushCalleeSavedRegisters: no-op since we don't need to save anything.
//
void CodeGen::genPushCalleeSavedRegisters(regNumber initReg, bool* pInitRegZeroed)
{
}

//------------------------------------------------------------------------
// genAllocLclFrame: initialize the SP and FP locals.
//
// Arguments:
//    frameSize         - Size of the frame to establish
//    initReg           - Unused
//    pInitRegZeroed    - Unused
//    maskArgRegsLiveIn - Unused
//
void CodeGen::genAllocLclFrame(unsigned frameSize, regNumber initReg, bool* pInitRegZeroed, regMaskTP maskArgRegsLiveIn)
{
    assert(GetEmitter()->emitGeneratingPrologOrFuncletProlog());
    regNumber spReg = GetStackPointerReg(m_compiler->funCurrentFuncIdx());
    if (spReg == REG_NA)
    {
        assert(!isFramePointerUsed());
        return;
    }

    m_compiler->unwindAllocStack(frameSize);

    unsigned initialSPLclIndex;
    unsigned spLclIndex = WasmRegToIndex(spReg);
    if (!m_compiler->lvaGetDesc(m_compiler->lvaWasmSpArg)->lvIsParam)
    {
        initialSPLclIndex = spLclIndex;
        GetEmitter()->emitIns_I(INS_global_get, EA_HANDLE_CNS_RELOC,
                                (cnsval_ssize_t)(size_t)m_compiler->eeGetWasmWellKnownGlobals()->stackPointer);
        GetEmitter()->emitIns_I(INS_local_set, EA_PTRSIZE, initialSPLclIndex);
    }
    else
    {
        initialSPLclIndex =
            WasmRegToIndex(m_compiler->lvaGetParameterABIInfo(m_compiler->lvaWasmSpArg).Segment(0).GetRegister());
    }

    assert(initialSPLclIndex == spLclIndex);
    if (frameSize != 0)
    {
        GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, initialSPLclIndex);
        GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, frameSize);
        GetEmitter()->emitIns(INS_I_sub);
        GetEmitter()->emitIns_I(INS_local_set, EA_PTRSIZE, spLclIndex);
    }
    regNumber fpReg = GetFramePointerReg(m_compiler->funCurrentFuncIdx());
    if ((fpReg != REG_NA) && (fpReg != spReg))
    {
        GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, spLclIndex);
        GetEmitter()->emitIns_I(INS_local_set, EA_PTRSIZE, WasmRegToIndex(fpReg));
    }

    FuncInfoDsc* const func = m_compiler->funGetFunc(ROOT_FUNC_IDX);

    if (func->needsUnwindableFrame)
    {
        assert(m_compiler->lvaWasmVirtualIP != BAD_VAR_NUM);
        assert(m_compiler->lvaWasmFunctionIndex != BAD_VAR_NUM);

        // Helpers may be called without a PEP, so their identity is independent of the caller.
        GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetFramePointerRegIndex());
        if (m_compiler->opts.jitFlags->IsSet(JitFlags::JIT_FLAG_WASM_MANAGED_HELPER))
        {
            GetEmitter()->emitIns_I(INS_i32_const_frameidentity, EA_PTRSIZE, 0);
        }
        else if (m_compiler->lvaWasmPortableEntryPointArg != BAD_VAR_NUM)
        {
            unsigned pepIndex = WasmRegToIndex(
                m_compiler->lvaGetParameterABIInfo(m_compiler->lvaWasmPortableEntryPointArg).Segment(0).GetRegister());
            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, pepIndex);
        }
        else
        {
            // Reverse P/Invokes have no PEP argument. Positive odd identities retain their table index.
            GetEmitter()->emitFuncletAddressConstant(0);
            GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, 1);
            GetEmitter()->emitIns(INS_I_shl);
            GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, 1);
            GetEmitter()->emitIns(INS_I_or);
        }
        GetEmitter()->emitIns_S(ins_Store(TYP_I_IMPL), EA_PTRSIZE, m_compiler->lvaWasmFunctionIndex, 0);

        // Ensure the resume IP is initialized to a non-resuming value.
        if ((m_compiler->funCurrentFuncIdx() == ROOT_FUNC_IDX) && (m_compiler->lvaWasmResumeIP != BAD_VAR_NUM))
        {
            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetFramePointerRegIndex());
            GetEmitter()->emitIns_I(INS_I_const, EA_4BYTE, 0);
            GetEmitter()->emitIns_S(ins_Store(TYP_INT), EA_4BYTE, m_compiler->lvaWasmResumeIP, 0);
        }
    }
}

//------------------------------------------------------------------------
// genEnregisterOSRArgsAndLocals: enregister OSR args and locals.
//
void CodeGen::genEnregisterOSRArgsAndLocals(regNumber initReg, bool* pInitRegZeroed)
{
    unreached(); // OSR not supported on WASM.
}

//------------------------------------------------------------------------
// genZeroInitFrame: zero the lvMustInit untracked range of the frame using
// a single memory.fill.
//
// Arguments:
//    untrLclHi      - High offset (exclusive) of the untracked range relative to FP.
//    untrLclLo      - Low offset of the untracked range relative to FP.
//    initReg        - Unused on WASM (no scratch register concept).
//    pInitRegZeroed - Unused on WASM.
//
void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg, bool* pInitRegZeroed)
{
    assert(GetEmitter()->emitGeneratingPrologOrFuncletProlog());
    if (!genUseBlockInit)
    {
        // Nothing to zero (genCheckUseBlockInit forces block-init for any non-empty range on wasm).
        assert(genInitStkLclCnt == 0);
        return;
    }
    assert(untrLclHi > untrLclLo);
    assert(untrLclLo >= 0); // Wasm locals are at non-negative offsets from FP.

    emitter* emit = GetEmitter();

    // Push destination address: FP (+ untrLclLo if non-zero).
    emit->emitIns_I(INS_local_get, EA_PTRSIZE, GetFramePointerRegIndex());
    if (untrLclLo != 0)
    {
        emit->emitIns_I(INS_I_const, EA_PTRSIZE, untrLclLo);
        emit->emitIns(INS_I_add);
    }
    // Push fill value (zero, always i32 per memory.fill spec).
    emit->emitIns_I(INS_i32_const, EA_4BYTE, 0);
    // Push length (pointer-sized: i32 on wasm32, i64 on wasm64).
    emit->emitIns_I(INS_I_const, EA_PTRSIZE, untrLclHi - untrLclLo);
    // memory.fill 0
    emit->emitIns_I(INS_memory_fill, EA_4BYTE, LINEAR_MEMORY_INDEX);
}

//------------------------------------------------------------------------
// genZeroInitFrameUsingBlockInit: Unused on WASM (genZeroInitFrame handles block init inline).
//
void CodeGen::genZeroInitFrameUsingBlockInit(int untrLclHi, int untrLclLo, regNumber initReg, bool* pInitRegZeroed)
{
    unreached();
}

//------------------------------------------------------------------------
// genOSRHandleTier0CalleeSavedRegistersAndFrame:
//   Not called for WASM without OSR support.
//
void CodeGen::genOSRHandleTier0CalleeSavedRegistersAndFrame()
{
    unreached();
}

//------------------------------------------------------------------------
// WasmBitCastInstruction: Get the instruction for a wasm bitcast.
//
// Arguments:
//    toType   - The target type
//    fromType - The source type
//
static instruction WasmBitCastInstruction(var_types toType, var_types fromType)
{
    toType   = genActualType(toType);
    fromType = genActualType(fromType);

    if ((toType == TYP_REF) || (toType == TYP_BYREF))
    {
        toType = TYP_I_IMPL;
    }
    if ((fromType == TYP_REF) || (fromType == TYP_BYREF))
    {
        fromType = TYP_I_IMPL;
    }

    if (toType == fromType)
    {
        return INS_none;
    }

    if ((toType == TYP_INT) && (fromType == TYP_FLOAT))
    {
        return INS_i32_reinterpret_f32;
    }
    if ((toType == TYP_FLOAT) && (fromType == TYP_INT))
    {
        return INS_f32_reinterpret_i32;
    }
    if ((toType == TYP_LONG) && (fromType == TYP_DOUBLE))
    {
        return INS_i64_reinterpret_f64;
    }
    if ((toType == TYP_DOUBLE) && (fromType == TYP_LONG))
    {
        return INS_f64_reinterpret_i64;
    }

    unreached();
}

//------------------------------------------------------------------------
// genHomeRegisterParams: place register arguments into their RA-assigned locations.
//
// For the WASM RA, arguments whose local and ABI types agree remain in their
// incoming registers. Arguments whose types differ are moved to registers of
// their local types here. No cycle resolution is needed because those target
// registers are newly declared wasm locals.
//
// The main motivation for this (along with the obvious CQ implications) is
// obviating the need to adapt the general "RegGraph"-based algorithm to
// !HAS_FIXED_REGISTER_SET constraints (no reg masks).
//
// Arguments:
//    initReg            - Unused
//    initRegStillZeroed - Unused
//
void CodeGen::genHomeRegisterParams(regNumber initReg, bool* initRegStillZeroed)
{
    JITDUMP("*************** In genHomeRegisterParams()\n");

    auto spillParam = [this](unsigned lclNum, unsigned offset, unsigned paramLclNum, const ABIPassingSegment& segment) {
        assert(segment.IsPassedInRegister());

        LclVarDsc* varDsc      = m_compiler->lvaGetDesc(lclNum);
        LclVarDsc* paramVarDsc = m_compiler->lvaGetDesc(paramLclNum);
        var_types  sourceType  = genParamStackType(paramVarDsc, segment);

        // Skip homing parameters that are dead at method entry (not live into the first block).
        // Exception: on wasm all on-frame GC locals are reported to the GC stack walk as untracked
        // (i.e. live for the whole method), so a GC parameter's frame slot must still be homed
        if (varDsc->lvTracked &&
            !VarSetOps::IsMember(m_compiler, m_compiler->fgFirstBB->bbLiveIn, varDsc->lvVarIndex) &&
            !(varDsc->lvOnFrame && varDsc->HasGCPtr()))
        {
            return;
        }

        if (varDsc->lvOnFrame && (!varDsc->lvIsInReg() || varDsc->IsLiveInOutOfHandler()))
        {
            var_types storeType = sourceType;
            if (!varDsc->TypeIs(TYP_STRUCT) && (genTypeSize(genActualType(varDsc)) < genTypeSize(storeType)))
            {
                // Can happen for struct fields due to padding.
                storeType = genActualType(varDsc);
            }

            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetFramePointerRegIndex());
            GetEmitter()->emitIns_I(INS_local_get, emitActualTypeSize(storeType),
                                    WasmRegToIndex(segment.GetRegister()));
            GetEmitter()->emitIns_S(ins_Store(storeType), emitActualTypeSize(storeType), lclNum, offset);
        }

        if (varDsc->lvIsInReg())
        {
            regNumber sourceReg = segment.GetRegister();
            regNumber targetReg = varDsc->GetRegNum();

            if (targetReg != sourceReg)
            {
                var_types targetType = varDsc->GetRegisterType();
                assert(WasmRegToType(sourceReg) == ActualTypeToWasmValueType(sourceType));
                assert(WasmRegToType(targetReg) == ActualTypeToWasmValueType(targetType));
                assert(((sourceType == TYP_FLOAT) && (targetType == TYP_INT)) ||
                       ((sourceType == TYP_DOUBLE) && (targetType == TYP_LONG)));

                GetEmitter()->emitIns_I(INS_local_get, emitActualTypeSize(sourceType), WasmRegToIndex(sourceReg));

                GetEmitter()->emitIns(WasmBitCastInstruction(targetType, sourceType));
                GetEmitter()->emitIns_I(INS_local_set, emitActualTypeSize(targetType), WasmRegToIndex(targetReg));
            }
        }
    };

    for (unsigned lclNum = 0; lclNum < m_compiler->info.compArgsCount; lclNum++)
    {
        LclVarDsc*                   lclDsc  = m_compiler->lvaGetDesc(lclNum);
        const ABIPassingInformation& abiInfo = m_compiler->lvaGetParameterABIInfo(lclNum);

        for (const ABIPassingSegment& segment : abiInfo.Segments())
        {
            if (!segment.IsPassedInRegister())
            {
                continue;
            }

            const ParameterRegisterLocalMapping* mapping =
                m_compiler->FindParameterRegisterLocalMappingByRegister(segment.GetRegister());

            bool spillToBaseLocal = true;
            if (mapping != nullptr)
            {
                spillParam(mapping->LclNum, mapping->Offset, lclNum, segment);

                // If home is shared with base local, then skip spilling to the base local.
                if (lclDsc->lvPromoted)
                {
                    spillToBaseLocal = false;
                }
            }

            if (spillToBaseLocal)
            {
                spillParam(lclNum, segment.Offset, lclNum, segment);
            }
        }
    }
}

//------------------------------------------------------------------------
// genReportGenericContextArg: spill the generic context (or "this") into its
// GC-reportable frame slot in the prolog so the GC stack walk can locate it.
// initReg / pInitRegZeroed are unused on wasm.
//
void CodeGen::genReportGenericContextArg(regNumber initReg, bool* pInitRegZeroed)
{
    assert(GetEmitter()->emitGeneratingPrologOrFuncletProlog());

    const bool reportArg  = m_compiler->lvaReportParamTypeArg();
    const bool reportThis = m_compiler->lvaKeepAliveAndReportThis();
    if (!reportArg && !reportThis)
    {
        return;
    }

    const unsigned contextArg = reportArg ? m_compiler->info.compTypeCtxtArg : m_compiler->info.compThisArg;
    noway_assert(contextArg != BAD_VAR_NUM);

    // The context arg is still in its incoming register at this point in the prolog.
    const ABIPassingInformation& abiInfo = m_compiler->lvaGetParameterABIInfo(contextArg);
    assert(abiInfo.HasExactlyOneRegisterSegment());
    const regNumber reg = abiInfo.Segment(0).GetRegister();

    // [FP + lvaCachedGenericContextArgOffset()] = contextArg
    emitter* emit = GetEmitter();
    emit->emitIns_I(INS_local_get, EA_PTRSIZE, GetFramePointerRegIndex());
    emit->emitIns_I(INS_local_get, EA_PTRSIZE, WasmRegToIndex(reg));
    emit->emitIns_I(ins_Store(TYP_I_IMPL), EA_PTRSIZE, m_compiler->lvaCachedGenericContextArgOffset());
}

void CodeGen::genFnEpilog(BasicBlock* block)
{
#ifdef DEBUG
    if (verbose)
    {
        printf("*************** In genFnEpilog()\n");
    }
#endif // DEBUG

#ifdef DEBUG
    if (m_compiler->opts.dspCode)
        printf("\n__epilog:\n");
#endif // DEBUG

    bool jmpEpilog = block->HasFlag(BBF_HAS_JMP);

    // BBF_HAS_JMP on wasm comes only from fast tail calls. The return_call already
    // left the function, but the body still needs an INS_end if this is the last block.
    if (jmpEpilog)
    {
        if (block->IsLast() || m_compiler->bbIsFuncletBeg(block->Next()))
        {
            instGen(INS_end);
        }
        return;
    }

    // Restore __stack_pointer to the value it had on entry
    if (m_compiler->opts.IsReversePInvoke())
    {
        assert(m_compiler->funCurrentFuncIdx() == ROOT_FUNC_IDX);
        regNumber fpReg = GetFramePointerReg(ROOT_FUNC_IDX);
        regNumber spReg = GetStackPointerReg(ROOT_FUNC_IDX);
        assert(spReg != REG_NA);

        // The FP local is fixed after the prolog; the SP local is only moved by localloc, which
        // requires a frame pointer.
        regNumber frameBaseReg = (fpReg != REG_NA) ? fpReg : spReg;
        GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, WasmRegToIndex(frameBaseReg));
        if (genTotalFrameSize() != 0)
        {
            GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, genTotalFrameSize());
            GetEmitter()->emitIns(INS_I_add);
        }
        GetEmitter()->emitIns_I(INS_global_set, EA_HANDLE_CNS_RELOC,
                                (cnsval_ssize_t)(size_t)m_compiler->eeGetWasmWellKnownGlobals()->stackPointer);
    }

    // TODO-WASM: we need to handle the end-of-function case if we reach the end of a codegen for a function
    // and do NOT have an epilog. In those cases we currently will not emit an end instruction.
    if (block->IsLast() || m_compiler->bbIsFuncletBeg(block->Next()))
    {
        instGen(INS_end);
    }
    else
    {
        instGen(INS_return);
    }
}

void CodeGen::genCaptureFuncletPrologEpilogInfo()
{
}

//------------------------------------------------------------------------
// genFuncletProlog: codegen for funclet prologs.
//
// Arguments:
//   block - the funclet entry block
//
void CodeGen::genFuncletProlog(BasicBlock* block)
{
    assert(m_compiler->bbIsFuncletBeg(block));
    JITDUMP("*************** In genFuncletProlog()\n");

    GetEmitter()->emitIns(INS_code_size);

    // Local sig for the funclet
    //
    unsigned           localsCount  = 0;
    unsigned           funcletIndex = m_compiler->funCurrentFuncIdx();
    FuncInfoDsc* const func         = m_compiler->funGetFunc(funcletIndex);
    assert(funcletIndex > 0);
    assert(func->funWasmLocalDecls != nullptr);
    GetEmitter()->emitIns_I(INS_local_cnt, EA_8BYTE, func->funWasmLocalDecls->size());
    for (FuncInfoDsc::WasmLocalsDecl& decl : *func->funWasmLocalDecls)
    {
        GetEmitter()->emitIns_I_Ty(INS_local_decl, decl.Count, decl.Type, localsCount);
        localsCount += decl.Count;
    }

    // All the funclet params are used from their home registers, so nothing
    // needs homing here.
    //
    // If the funclet needs to be unwindable (contains any calls), set up
    // what we need.
    //
    if (func->needsUnwindableFrame)
    {
        // We need two stack slots for the frame identity and for the funclet virtual IP.
        // We also need to keep SP aligned.
        //
        size_t slotSize  = 2 * TARGET_POINTER_SIZE;
        size_t frameSize = AlignUp(slotSize, STACK_ALIGN);
        m_compiler->unwindAllocStack((unsigned)frameSize);

        // Move SP
        //
        GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());
        GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, frameSize);
        GetEmitter()->emitIns(INS_I_sub);
        GetEmitter()->emitIns_I(INS_local_set, EA_PTRSIZE, GetStackPointerRegIndex());

        GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());
        GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetFramePointerRegIndex());
        GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, 2);
        GetEmitter()->emitIns(INS_I_add);
        GetEmitter()->emitIns_I(ins_Store(TYP_I_IMPL), EA_PTRSIZE, 0);
    }
}

//------------------------------------------------------------------------
// genFuncletEpilog: codegen for funclet epilogs.
//
// Arguments:
//   block - funclet epilog block
//
void CodeGen::genFuncletEpilog(BasicBlock* block)
{
    if (block->IsLast() || m_compiler->bbIsFuncletBeg(block->Next()))
    {
        instGen(INS_end);
    }
    else
    {
        instGen(INS_return);
    }
}

//------------------------------------------------------------------------
// getBlockIndex: return the index of this block in the linear block
//   order
//
// Arguments:
//   block - block in question
//
// Returns:
//   index of block
//
static unsigned getBlockIndex(BasicBlock* block)
{
    return block->bbPreorderNum;
}

//------------------------------------------------------------------------
// findTargetDepth: find the depth of a target block in the wasm control flow stack
//
// Arguments:
//   targetBlock - block to branch to
//   (implicit) compCurBB -- block to branch from
//
// Returns:
//   depth of target block in control stack
//
unsigned CodeGen::findTargetDepth(BasicBlock* targetBlock)
{
    BasicBlock* const sourceBlock = m_compiler->compCurBB;
    int const         h           = wasmControlFlowStack->Height();

    const unsigned targetIndex = getBlockIndex(targetBlock);
    const unsigned sourceIndex = getBlockIndex(sourceBlock);
    const bool     isBackedge  = targetIndex <= sourceIndex;

    for (int i = 0; i < h; i++)
    {
        WasmInterval* const ii    = wasmControlFlowStack->Top(i);
        unsigned            match = 0;

        if (isBackedge)
        {
            // loops bind to start
            match = ii->Start();
        }
        else
        {
            // Try and ExnRefWrapper ends inject auto-emitted code (unreachable / exnref
            // local.set) so they are not valid plain br targets; use the paired Block.
            //
            if (ii->IsTry() || ii->IsExnRefWrapper())
            {
                continue;
            }

            // blocks bind to end
            match = ii->End();
        }

        if ((match == targetIndex) && (isBackedge == ii->IsLoop()))
        {
            return i;
        }
    }

#ifdef DEBUG
    JITDUMP("Could not find " FMT_BB "[%u]%s in active control stack\n", targetBlock->bbNum, targetIndex,
            isBackedge ? " (backedge)" : "");
    JITDUMP("Current stack is\n");

    for (int i = 0; i < h; i++)
    {
        WasmInterval* const ii = wasmControlFlowStack->Top(i);
        JITDUMPEXEC(ii->Dump());
    }
#endif

    assert(!"Can't find target in control stack");

    return ~0;
}

//------------------------------------------------------------------------
// genEmitStartBlock: prepare for codegen in a block
//
// Arguments:
//   block - block to prepare for
//
// Notes:
//   Updates the wasm control flow stack
//
void CodeGen::genEmitStartBlock(BasicBlock* block)
{
    const unsigned cursor = getBlockIndex(block);

    // Pop control flow intervals that end here and emit wasm END instructions for them.
    //
    while (!wasmControlFlowStack->Empty() && (wasmControlFlowStack->Top()->End() == cursor))
    {
        WasmInterval* const topInterval = wasmControlFlowStack->Top();

        // The [exnref]-wrapper is only meant to be reached via catch_ref; any
        // normal-flow fall-through into its `end` would fail to provide the
        // required [exnref]. Emit `unreachable` right before the wrapper's end
        // so the fall-through path is polymorphic.
        //
        if (topInterval->IsExnRefWrapper())
        {
            instGen(INS_unreachable);
        }

        instGen(INS_end);
        WasmInterval* interval = wasmControlFlowStack->Pop();

        // After a TRY's `end`, emit `unreachable` so the rest of its
        // [exnref]-wrapper body is polymorphic — try_table itself uses void
        // result sig, so without this the wrapper's `end` would not validate
        // against its [exnref] sig.
        //
        if (interval->IsTry())
        {
            instGen(INS_unreachable);
        }

        // Stash the [exnref] that catch_ref pushed onto the wrapper's `end`
        // into the per-funclet local so any later throw_ref can reload it.
        //
        if (interval->IsExnRefWrapper())
        {
            unsigned const exnRefIdx = m_compiler->funCurrentFunc()->funWasmExnRefLocalIndex;
            assert(exnRefIdx != UINT_MAX);
            GetEmitter()->emitIns_I(INS_local_set, EA_PTRSIZE, exnRefIdx);
        }
    }

    // Push control flow for intervals that start here or earlier, and emit
    // Wasm BLOCK or LOOP instruction
    //
    if (wasmCursor < m_compiler->fgWasmIntervals->size())
    {
        WasmInterval* interval = m_compiler->fgWasmIntervals->at(wasmCursor);
        WasmInterval* chain    = interval->Chain();

        while (chain->Start() <= cursor)
        {
            if (interval->IsLoop())
            {
                GetEmitter()->emitIns_BlockTy(INS_loop);
            }
            else if (interval->IsTry() && m_compiler->IsNativeAot())
            {
                // TODO-NativeAOT-WASM: Preserve interval nesting without CoreCLR's catch-resumption tag during
                // NativeAOT bringup.
                GetEmitter()->emitIns_BlockTy(INS_block);
            }
            else if (interval->IsTry())
            {
                // Handle try_table emission here, since there may be blocks nested inside.
                // (that is, we can't wait until we do codegen the block IR)
                //
                LIR::Range&    blockRange = LIR::AsRange(block);
                GenTree* const jTrue      = blockRange.LastNode();
                assert(jTrue->OperIs(GT_WASM_JEXCEPT));

                // try_table uses void result sig; the paired [exnref]-wrapper
                // provides the catch_ref target. Find its depth on the control
                // flow stack: any plain Blocks emitted between the wrapper and
                // this try_table sit inside the wrapper and shift its index.
                //
                GetEmitter()->emitIns_Ty_I(INS_try_table, WasmValueType::Invalid, 1);

                int const stackHeight  = wasmControlFlowStack->Height();
                unsigned  wrapperDepth = UINT_MAX;
                for (int i = 0; i < stackHeight; i++)
                {
                    if (wasmControlFlowStack->Top(i)->IsExnRefWrapper())
                    {
                        wrapperDepth = (unsigned)i;
                        break;
                    }
                }
                assert(wrapperDepth != UINT_MAX);

                // One catch clause targeting the wrapper. The true target of
                // GT_WASM_JEXCEPT is passed only for disasm readability.
                //
                assert(block->GetFalseTarget() == block->Next());
                BasicBlock* const target = block->GetTrueTarget();
                GetEmitter()->emitIns_J(INS_catch_ref, EA_4BYTE, wrapperDepth, target);
            }
            else
            {
                assert(interval->IsBlock());
                if (interval->IsExnRefWrapper())
                {
                    GetEmitter()->emitIns_BlockTy(INS_block, WasmValueType::ExnRef);
                }
                else
                {
                    GetEmitter()->emitIns_BlockTy(INS_block);
                }
            }

            wasmCursor++;
            wasmControlFlowStack->Push(interval);

            if (interval->IsLoop())
            {
                if (!block->HasFlag(BBF_HAS_LABEL))
                {
                    block->SetFlags(BBF_HAS_LABEL);
                    genDefineTempLabel(block);
                }
            }
            else
            {
                BasicBlock* const endBlock = m_compiler->fgIndexToBlockMap[interval->End()];

                if (!endBlock->HasFlag(BBF_HAS_LABEL))
                {
                    endBlock->SetFlags(BBF_HAS_LABEL);
                    genDefineTempLabel(endBlock);
                }
            }

            if (wasmCursor >= m_compiler->fgWasmIntervals->size())
            {
                break;
            }

            interval = m_compiler->fgWasmIntervals->at(wasmCursor);
            chain    = interval->Chain();
        }
    }
}

//------------------------------------------------------------------------
// genEmitFunctionEnd: close still-open control flow intervals and emit the
//   function-body terminator.
//
// Arguments:
//   emitTerminalUnreachable - if true, emit `unreachable` before the closing
//     `end` so the implicit return is polymorphic. Callers that have already
//     emitted a terminator (e.g. BBJ_THROW) pass false.
//
// Notes:
//   Per-interval bookkeeping mirrors genEmitStartBlock: Try needs a trailing
//   `unreachable`; ExnRefWrapper needs a preceding `unreachable` and a
//   trailing `local.set` of the per-funclet exnref local.
//
void CodeGen::genEmitFunctionEnd(bool emitTerminalUnreachable)
{
    while (!wasmControlFlowStack->Empty())
    {
        WasmInterval* const topInterval = wasmControlFlowStack->Top();

        if (topInterval->IsExnRefWrapper())
        {
            instGen(INS_unreachable);
        }

        instGen(INS_end);
        WasmInterval* interval = wasmControlFlowStack->Pop();

        if (interval->IsTry())
        {
            instGen(INS_unreachable);
        }

        if (interval->IsExnRefWrapper())
        {
            unsigned const exnRefIdx = m_compiler->funCurrentFunc()->funWasmExnRefLocalIndex;
            assert(exnRefIdx != UINT_MAX);
            GetEmitter()->emitIns_I(INS_local_set, EA_PTRSIZE, exnRefIdx);
        }
    }

    if (emitTerminalUnreachable)
    {
        instGen(INS_unreachable);
    }
    instGen(INS_end);
}

//------------------------------------------------------------------------
// WasmProduceReg: Produce a register and update liveness for an emitted node.
//
// Wrapper over "genProduceReg". Does two additional things:
// 1. Emits "local.tee"s for nodes that produce temporary registers so that
//    they can be used multiple times.
// 2. Emits "drop" for unused values.
//
// Arguments:
//    node - The emitted node
//
void CodeGen::WasmProduceReg(GenTree* node)
{
    assert(!genIsRegCandidateLocal(node)); // Candidate liveness is handled in "genConsumeReg".
    if (genIsValidReg(node->GetRegNum()))
    {
        GetEmitter()->emitIns_I(INS_local_tee, emitActualTypeSize(node), WasmRegToIndex(node->GetRegNum()));
    }
    genProduceReg(node);
    if (node->IsUnusedValue())
    {
        GetEmitter()->emitIns(INS_drop);
    }
}

//------------------------------------------------------------------------
// GetMultiUseOperandReg: Get the register of a multi-use operand.
//
// If the operand is a candidate, we use that candidate's current register.
// Otherwise it must have been allocated into a temporary register initialized
// in 'WasmProduceReg'. To do this, call SetMultiplyUsed(treeNode) during
// lowering and ensure that regalloc is updated to call 'ConsumeTemporaryRegForOperand'
// on the node(s) that need to be used multiple times.
//
// Arguments:
//    operand - The operand node
//
// Return Value:
//    The register to use for 'operand'.
//
regNumber CodeGen::GetMultiUseOperandReg(GenTree* operand)
{
    if (genIsRegCandidateLocal(operand))
    {
        LclVarDsc* varDsc = m_compiler->lvaGetDesc(operand->AsLclVar());
        assert(varDsc->lvIsInReg());
        return varDsc->GetRegNum();
    }

    regNumber reg = operand->GetRegNum();
    assert(genIsValidReg(reg));
    return reg;
}

//------------------------------------------------------------------------
// WasmValueTypeToEmitAttr: Get the emit attribute describing a wasm value type.
//
// Arguments:
//    type - The wasm value type
//
static emitAttr WasmValueTypeToEmitAttr(WasmValueType type)
{
    switch (type)
    {
        case WasmValueType::I32:
        case WasmValueType::F32:
            return EA_4BYTE;
        case WasmValueType::I64:
        case WasmValueType::F64:
            return EA_8BYTE;
        case WasmValueType::V128:
            return EA_16BYTE;
        case WasmValueType::ExnRef:
            return EA_PTRSIZE;
        default:
            unreached();
    }
}

//------------------------------------------------------------------------
// genEmitLocalGet: Push a register's value onto the wasm value stack, converting if needed.
//
// A wasm "regNumber" encodes the value type of the local it names, so a mismatch against the type
// the value is being read at can be detected here rather than at each use.
//
// This matters because morph folds "CAST(int <- long, LCL_VAR long)" into "LCL_VAR int" naming the
// same long local. Unlike a shadow stack slot, a wasm local cannot be loaded at a narrower type, so
// reading such a value needs an explicit "i32.wrap_i64". Without it we emit an i64 where an i32 is
// expected and the module fails validation.
//
// Arguments:
//    reg          - The register holding the value
//    expectedType - The wasm type the value is being read at
//
void CodeGen::genEmitLocalGet(regNumber reg, WasmValueType expectedType)
{
    WasmValueType const actualType = WasmRegToType(reg);

    GetEmitter()->emitIns_I(INS_local_get, WasmValueTypeToEmitAttr(actualType), WasmRegToIndex(reg));

    if (actualType != expectedType)
    {
        // Narrowing a long local is the only conversion a register read can require.
        assert(actualType == WasmValueType::I64);
        assert(expectedType == WasmValueType::I32);
        GetEmitter()->emitIns(INS_i32_wrap_i64);
    }
}

//------------------------------------------------------------------------
// genEmitLocalGet: Push a register's value onto the wasm value stack, converting if needed.
//
// Arguments:
//    reg          - The register holding the value
//    expectedType - The type the value is being read at
//
void CodeGen::genEmitLocalGet(regNumber reg, var_types expectedType)
{
    genEmitLocalGet(reg, ActualTypeToWasmValueType(genActualType(expectedType)));
}

//------------------------------------------------------------------------
// genCodeForTreeNode: codegen for a particular tree node
//
// Arguments:
//   treeNode - node to generate code for
//
void CodeGen::genCodeForTreeNode(GenTree* treeNode)
{
#ifdef DEBUG
    lastConsumedNode = nullptr;
    if (m_compiler->verbose)
    {
        m_compiler->gtDispLIRNode(treeNode, "Generating: ");
    }
#endif // DEBUG

    assert(!treeNode->IsReuseRegVal()); // TODO-WASM-CQ: enable.

    // Contained nodes are part of the parent for codegen purposes.
    if (treeNode->isContained())
    {
        return;
    }

#ifdef FEATURE_HW_INTRINSICS
    if (treeNode->OperIsHWIntrinsic())
    {
        genHWIntrinsic(treeNode->AsHWIntrinsic());
        return;
    }
#endif // FEATURE_HW_INTRINSICS

    switch (treeNode->OperGet())
    {
        case GT_ADD:
        case GT_SUB:
        case GT_MUL:
        case GT_OR:
        case GT_XOR:
        case GT_AND:
            genCodeForBinary(treeNode->AsOp());
            break;

        case GT_DIV:
        case GT_MOD:
        case GT_UDIV:
        case GT_UMOD:
            genCodeForDivMod(treeNode->AsOp());
            break;

        case GT_LSH:
        case GT_RSH:
        case GT_RSZ:
        case GT_ROL:
        case GT_ROR:
            genCodeForShift(treeNode);
            break;

        case GT_EQ:
        case GT_NE:
        case GT_LT:
        case GT_LE:
        case GT_GE:
        case GT_GT:
            genCodeForCompare(treeNode->AsOp());
            break;

        case GT_LCL_ADDR:
            genCodeForLclAddr(treeNode->AsLclFld());
            break;

        case GT_LCL_FLD:
            genCodeForLclFld(treeNode->AsLclFld());
            break;

        case GT_LCL_VAR:
            genCodeForLclVar(treeNode->AsLclVar());
            break;

        case GT_STORE_LCL_VAR:
            genCodeForStoreLclVar(treeNode->AsLclVar());
            break;

        case GT_PHYSREG:
            genCodeForPhysReg(treeNode->AsPhysReg());
            break;

        case GT_FRAME_SIZE:
            genCodeForFrameSize(treeNode);
            break;

        case GT_JTRUE:
            genCodeForJTrue(treeNode->AsOp());
            break;

        case GT_SWITCH:
            genTableBasedSwitch(treeNode);
            break;

        case GT_RETURN:
        case GT_RETFILT:
            genReturn(treeNode);
            break;

        case GT_IL_OFFSET:
            // Do nothing; this node is a marker for debug info.
            break;

        case GT_NOP:
            break;

        case GT_NO_OP:
            instGen(INS_nop);
            break;

        case GT_CNS_INT:
        case GT_CNS_LNG:
        case GT_CNS_DBL:
            genCodeForConstant(treeNode);
            break;

        case GT_CAST:
            genCodeForCast(treeNode->AsOp());
            break;

        case GT_BITCAST:
            genCodeForBitCast(treeNode->AsOp());
            break;

        case GT_NEG:
        case GT_NOT:
            genCodeForNegNot(treeNode->AsOp());
            break;

        case GT_IND:
            genCodeForIndir(treeNode->AsIndir());
            break;

        case GT_STOREIND:
            genCodeForStoreInd(treeNode->AsStoreInd());
            break;

        case GT_CALL:
            genCall(treeNode->AsCall());
            break;

        case GT_NULLCHECK:
            genCodeForNullCheck(treeNode->AsIndir());
            break;

        case GT_BOUNDS_CHECK:
            genRangeCheck(treeNode);
            break;

        case GT_KEEPALIVE:
            // TODO-WASM-RA: remove KEEPALIVE after we've produced the GC info.
            genConsumeRegs(treeNode->AsOp()->gtOp1);
            GetEmitter()->emitIns(INS_drop);
            break;

        case GT_LCLHEAP:
            genLclHeap(treeNode);
            break;

        case GT_INDEX_ADDR:
            genCodeForIndexAddr(treeNode->AsIndexAddr());
            break;

        case GT_LEA:
            genLeaInstruction(treeNode->AsAddrMode());
            break;

        case GT_STORE_BLK:
            genCodeForStoreBlk(treeNode->AsBlk());
            break;

        case GT_MEMORYBARRIER:
            // No-op for single-threaded wasm.
            assert(!WASM_THREAD_SUPPORT);
            JITDUMP("Ignoring GT_MEMORYBARRIER; single-threaded codegen\n");
            break;

        case GT_INTRINSIC:
            genIntrinsic(treeNode->AsIntrinsic());
            break;

        case GT_WASM_JEXCEPT:
            // no codegen needed here.
            break;

        case GT_WASM_THROW_REF:
            // Reload and rethrow the exnref stashed at the catch_ref landing.
            {
                unsigned const exnRefIdx = m_compiler->funCurrentFunc()->funWasmExnRefLocalIndex;
                assert(exnRefIdx != UINT_MAX);
                GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, exnRefIdx);
                GetEmitter()->emitIns(INS_throw_ref);
            }
            break;

        case GT_CATCH_ARG:
            genCatchArg(treeNode);
            break;

        case GT_CKFINITE:
            genCkfinite(treeNode);
            break;

#if defined(FEATURE_SIMD)
        case GT_CNS_VEC:
            genCodeForVectorConstant(treeNode);
            break;
#endif // FEATURE_SIMD

        case GT_ASYNC_CONTINUATION:
            genCodeForAsyncContinuation(treeNode);
            break;

        case GT_RETURN_SUSPEND:
            genReturnSuspend(treeNode->AsUnOp());
            break;

        case GT_ASYNC_RESUME_INFO:
            genAsyncResumeInfo(treeNode->AsVal());
            break;

        case GT_RECORD_ASYNC_RESUME:
            genRecordAsyncResume(treeNode->AsVal());
            break;

        default:
#ifdef DEBUG
            NYIRAW(GenTree::OpName(treeNode->OperGet()));
#else
            NYI_WASM("Opcode not implemented");
#endif
            break;
    }
}

//------------------------------------------------------------------------
// genCodeForJTrue: emit Wasm br_if
//
// Arguments:
//    treeNode - predicate value
//
void CodeGen::genCodeForJTrue(GenTreeOp* jtrue)
{
    BasicBlock* const block = m_compiler->compCurBB;
    assert(block->KindIs(BBJ_COND));

    genConsumeOperands(jtrue);

    BasicBlock* const trueTarget  = block->GetTrueTarget();
    BasicBlock* const falseTarget = block->GetFalseTarget();

    // We don't expect degenerate BBJ_COND
    //
    assert(trueTarget != falseTarget);

    // We don't expect the true target to be the next block.
    //
    assert(trueTarget != block->Next());

    // br_if for true target
    //
    inst_JMP(EJ_jmpif, trueTarget);

    // br for false target, if not fallthrough
    //
    if (!block->CanRemoveJumpToTarget(falseTarget, m_compiler))
    {
        inst_JMP(EJ_jmp, falseTarget);
    }
}

//------------------------------------------------------------------------
// genTableBasedSwitch: emit Wasm br_table
//
// Arguments:
//    treeNode - value to switch on
//
void CodeGen::genTableBasedSwitch(GenTree* treeNode)
{
    BasicBlock* const block = m_compiler->compCurBB;
    assert(block->KindIs(BBJ_SWITCH));

    genConsumeOperands(treeNode->AsOp());

    BBswtDesc* const desc      = block->GetSwitchTargets();
    unsigned const   caseCount = desc->GetCaseCount();

    // We don't expect degenerate or default-less switches
    //
    assert(caseCount > 0);
    assert(desc->HasDefaultCase());

    // br_table list (labelidx*) labelidx
    // list is prefixed with length, which is caseCount - 1
    //
    GetEmitter()->emitIns_I(INS_br_table, EA_4BYTE, caseCount - 1);

    // Emit the list case targets, then default case target
    // (which is always the last case in the desc).
    //
    for (unsigned caseNum = 0; caseNum < caseCount; caseNum++)
    {
        BasicBlock* const caseTarget = desc->GetCase(caseNum)->getDestinationBlock();
        unsigned          depth      = findTargetDepth(caseTarget);

        GetEmitter()->emitIns_J(INS_label, EA_4BYTE, depth, caseTarget);
    }
}

//------------------------------------------------------------------------
// genCatchArg: emit code for GT_CATCH_ARG
//
// Arguments:
//    treeNode - catch arg node
//
void CodeGen::genCatchArg(GenTree* treeNode)
{
    assert(treeNode->OperIs(GT_CATCH_ARG));
    // The catch arg is passed as the 3rd parameter, so has Wasm local index 2.
    GetEmitter()->emitIns_I(INS_local_get, EA_GCREF, 2);
    WasmProduceReg(treeNode);
}

//------------------------------------------------------------------------
// genStoreAsyncContinuationGlobal: Pop the operand-stack top into the async continuation global.
//
void CodeGen::genStoreAsyncContinuationGlobal()
{
    GetEmitter()->emitIns_I(INS_global_set, EA_SET_FLG(EA_GCREF, EA_CNS_RELOC_FLG),
                            (cnsval_ssize_t)(size_t)m_compiler->eeGetWasmWellKnownGlobals()->asyncContinuation);
}

//------------------------------------------------------------------------
// genClearAsyncContinuationGlobal: Null the async continuation global on the normal-return path.
//
void CodeGen::genClearAsyncContinuationGlobal()
{
    emitter* emit = GetEmitter();
    emit->emitIns_I(INS_I_const, EA_PTRSIZE, 0);
    emit->emitIns_I(INS_global_set, EA_SET_FLG(EA_GCREF, EA_CNS_RELOC_FLG),
                    (cnsval_ssize_t)(size_t)m_compiler->eeGetWasmWellKnownGlobals()->asyncContinuation);
}

//------------------------------------------------------------------------
// genCodeForAsyncContinuation: Read the async continuation global onto the operand stack.
//
// Arguments:
//    tree - The GT_ASYNC_CONTINUATION node.
//
void CodeGen::genCodeForAsyncContinuation(GenTree* tree)
{
    assert(tree->OperIs(GT_ASYNC_CONTINUATION));
    assert(tree->TypeIs(TYP_REF));

    GetEmitter()->emitIns_I(INS_global_get, EA_SET_FLG(EA_GCREF, EA_CNS_RELOC_FLG),
                            (cnsval_ssize_t)(size_t)m_compiler->eeGetWasmWellKnownGlobals()->asyncContinuation);
    WasmProduceReg(tree);
}

//------------------------------------------------------------------------
// genReturnSuspend: Emit code for a GT_RETURN_SUSPEND node.
//
// Stores the continuation into the async global, then pushes a zero of the native return type
// so the epilog's `return` is well-typed. Methods that return through a buffer lower to a wasm
// function with no result, so there is nothing to push for those.
//
// Arguments:
//    treeNode - The GT_RETURN_SUSPEND node.
//
void CodeGen::genReturnSuspend(GenTreeUnOp* treeNode)
{
    assert(treeNode->OperIs(GT_RETURN_SUSPEND));

    GenTree* op = treeNode->gtGetOp1();
    assert(op->TypeIs(TYP_REF));

    genConsumeReg(op);
    genStoreAsyncContinuationGlobal();

    var_types retNativeType = m_compiler->info.compRetNativeType;
    if ((retNativeType != TYP_VOID) && (m_compiler->info.compRetBuffArg == BAD_VAR_NUM))
    {
        emitter* emit = GetEmitter();
        switch (genActualType(retNativeType))
        {
            case TYP_INT:
            case TYP_REF:
            case TYP_BYREF:
                emit->emitIns_I(INS_i32_const, emitActualTypeSize(retNativeType), 0);
                break;
            case TYP_LONG:
                emit->emitIns_I(INS_i64_const, EA_8BYTE, 0);
                break;
            case TYP_FLOAT:
                emit->emitIns_I(INS_f32_const, EA_4BYTE, 0);
                break;
            case TYP_DOUBLE:
                emit->emitIns_I(INS_f64_const, EA_8BYTE, 0);
                break;
#ifdef FEATURE_SIMD
            case TYP_SIMD16:
            {
                // Vector128<T> is a wasm v128 returned by value.
                //
                uint8_t zero[16] = {};
                emit->emitIns_V128Imm(INS_v128_const, zero);
                break;
            }
#endif // FEATURE_SIMD
            default:
                unreached();
        }
    }
}

//------------------------------------------------------------------------
// genAsyncResumeInfo: Emit code for a GT_ASYNC_RESUME_INFO node.
//
// Pushes the address of the per-method resume-info entry.
//
// Arguments:
//    tree - The GT_ASYNC_RESUME_INFO node.
//
void CodeGen::genAsyncResumeInfo(GenTreeVal* tree)
{
    assert(tree->OperIs(GT_ASYNC_RESUME_INFO));
    assert(tree->TypeIs(TYP_I_IMPL));

    CORINFO_FIELD_HANDLE fieldHnd = genEmitAsyncResumeInfo((unsigned)tree->gtVal1);
    assert(m_compiler->eeIsJitDataOffs(fieldHnd));
    int dataOffs = m_compiler->eeGetJitDataOffs(fieldHnd);
    assert(dataOffs >= 0);

    GetEmitter()->emitDataOffsetConstant((UNATIVE_OFFSET)dataOffs);
    WasmProduceReg(tree);
}

//------------------------------------------------------------------------
// PackOperAndType: Pack a genTreeOps and var_types into a uint32_t
//
// Arguments:
//    oper - a genTreeOps to pack
//    type - a var_types to pack
//
// Return Value:
//    oper and type packed into an integer that can be used as a switch value/case
//
static constexpr uint32_t PackOperAndType(genTreeOps oper, var_types type)
{
    if ((type == TYP_BYREF) || (type == TYP_REF))
    {
        type = TYP_I_IMPL;
    }
    const int shift1 = ConstLog2<TYP_COUNT>::value + 1;
    return ((uint32_t)oper << shift1) | ((uint32_t)type);
}

// ------------------------------------------------------------------------
// PackTypes: Pack two var_types together into a uint32_t

// Arguments:
//    toType - a var_types to pack
//    fromType - a var_types to pack
//
// Return Value:
//    The two types packed together into an integer that can be used as a switch/value,
//    the primary use case being the handling of operations with two-type variants such
//    as casts.
//
static constexpr uint32_t PackTypes(var_types toType, var_types fromType)
{
    if (toType == TYP_BYREF || toType == TYP_REF)
    {
        toType = TYP_I_IMPL;
    }
    if (fromType == TYP_BYREF || fromType == TYP_REF)
    {
        fromType = TYP_I_IMPL;
    }
    const int shift1 = ConstLog2<TYP_COUNT>::value + 1;
    return ((uint32_t)toType) | ((uint32_t)fromType << shift1);
}

//------------------------------------------------------------------------
// genIntToIntCast: Generate code for an integer to integer cast
//
// Arguments:
//    cast - The GT_CAST node for the integer cast operation
//
// Notes:
//    Handles casts to and from small int, int, and long types
//    including proper sign extension and truncation as needed.
//
void CodeGen::genIntToIntCast(GenTreeCast* cast)
{
    GenIntCastDesc desc(cast);

    if (desc.CheckKind() != GenIntCastDesc::CHECK_NONE)
    {
        GenTree*  castValue = cast->gtGetOp1();
        regNumber castReg   = GetMultiUseOperandReg(castValue);
        genIntCastOverflowCheck(cast, desc, castReg);
    }

    var_types   toType     = genActualType(cast->CastToType());
    var_types   fromType   = genActualType(cast->CastOp());
    int         extendSize = desc.ExtendSrcSize();
    instruction ins        = INS_none;
    assert(fromType == TYP_INT || fromType == TYP_LONG);

    genConsumeOperands(cast);

    // TODO-WASM: Handle load containment GenIntCastDesc::LOAD_* cases once we mark containment for loads
    switch (desc.ExtendKind())
    {
        case GenIntCastDesc::COPY:
        {
            if (toType == TYP_INT && fromType == TYP_LONG)
            {
                ins = INS_i32_wrap_i64;
            }
            else
            {
                assert(toType == fromType);
                ins = INS_none;
            }
            break;
        }
        case GenIntCastDesc::ZERO_EXTEND_SMALL_INT:
        {
            int andAmount = extendSize == 1 ? 255 : 65535;
            if (fromType == TYP_LONG)
            {
                GetEmitter()->emitIns(INS_i32_wrap_i64);
            }
            GetEmitter()->emitIns_I(INS_i32_const, EA_4BYTE, andAmount);
            ins = INS_i32_and;
            break;
        }
        case GenIntCastDesc::SIGN_EXTEND_SMALL_INT:
        {
            if (fromType == TYP_LONG)
            {
                GetEmitter()->emitIns(INS_i32_wrap_i64);
            }
            ins = (extendSize == 1) ? INS_i32_extend8_s : INS_i32_extend16_s;

            break;
        }
        case GenIntCastDesc::ZERO_EXTEND_INT:
        {
            ins = INS_i64_extend_u_i32;
            break;
        }
        case GenIntCastDesc::SIGN_EXTEND_INT:
        {
            ins = INS_i64_extend_s_i32;
            break;
        }
        default:
            unreached();
    }

    if (ins != INS_none)
    {
        GetEmitter()->emitIns(ins);
    }
    WasmProduceReg(cast);
}

//------------------------------------------------------------------------
// genIntCastOverflowCheck: Generate overflow checking code for an integer cast.
//
// Arguments:
//    cast - The GT_CAST node
//    desc - The cast description
//    reg  - The register containing the value to check
//
void CodeGen::genIntCastOverflowCheck(GenTreeCast* cast, const GenIntCastDesc& desc, regNumber reg)
{
    bool const     is64BitSrc = (desc.CheckSrcSize() == 8);
    emitAttr const srcSize    = is64BitSrc ? EA_8BYTE : EA_4BYTE;

    genEmitLocalGet(reg, is64BitSrc ? WasmValueType::I64 : WasmValueType::I32);

    switch (desc.CheckKind())
    {
        case GenIntCastDesc::CHECK_POSITIVE:
        {
            // INT or LONG to ULONG
            GetEmitter()->emitIns_I(is64BitSrc ? INS_i64_const : INS_i32_const, srcSize, 0);
            GetEmitter()->emitIns(is64BitSrc ? INS_i64_lt_s : INS_i32_lt_s);
            genJumpToThrowHlpBlk(SCK_OVERFLOW);
            break;
        }

        case GenIntCastDesc::CHECK_UINT_RANGE:
        {
            // (U)LONG to UINT
            assert(is64BitSrc);
            GetEmitter()->emitIns_I(INS_i64_const, srcSize, UINT32_MAX);
            // We can re-interpret LONG as ULONG
            // Then negative values will be larger than UINT32_MAX
            GetEmitter()->emitIns(INS_i64_gt_u);
            genJumpToThrowHlpBlk(SCK_OVERFLOW);
            break;
        }

        case GenIntCastDesc::CHECK_POSITIVE_INT_RANGE:
        {
            // ULONG to INT
            GetEmitter()->emitIns_I(INS_i64_const, srcSize, INT32_MAX);
            GetEmitter()->emitIns(INS_i64_gt_u);
            genJumpToThrowHlpBlk(SCK_OVERFLOW);
            break;
        }

        case GenIntCastDesc::CHECK_INT_RANGE:
        {
            // LONG to INT
            GetEmitter()->emitIns(INS_i64_extend32_s);
            genEmitLocalGet(reg, is64BitSrc ? WasmValueType::I64 : WasmValueType::I32);
            GetEmitter()->emitIns(INS_i64_ne);
            genJumpToThrowHlpBlk(SCK_OVERFLOW);
            break;
        }

        case GenIntCastDesc::CHECK_SMALL_INT_RANGE:
        {
            // (U)(INT|LONG) to Small INT
            const int castMaxValue = desc.CheckSmallIntMax();
            const int castMinValue = desc.CheckSmallIntMin();

            if (castMinValue == 0)
            {
                // When the minimum is 0, a single unsigned upper-bound check is sufficient.
                // For signed sources, negative values become large unsigned values and
                // thus also trigger the overflow via the same comparison.
                GetEmitter()->emitIns_I(is64BitSrc ? INS_i64_const : INS_i32_const, srcSize, castMaxValue);
                GetEmitter()->emitIns(is64BitSrc ? INS_i64_gt_u : INS_i32_gt_u);
            }
            else
            {
                // We need to check a range around zero, eg [-128, 127] for 8-bit signed.
                // Do two compares and combine the results: (src > max) | (src < min).
                assert(!cast->IsUnsigned());
                GetEmitter()->emitIns_I(is64BitSrc ? INS_i64_const : INS_i32_const, srcSize, castMaxValue);
                GetEmitter()->emitIns(is64BitSrc ? INS_i64_gt_s : INS_i32_gt_s);
                genEmitLocalGet(reg, is64BitSrc ? WasmValueType::I64 : WasmValueType::I32);
                GetEmitter()->emitIns_I(is64BitSrc ? INS_i64_const : INS_i32_const, srcSize, castMinValue);
                GetEmitter()->emitIns(is64BitSrc ? INS_i64_lt_s : INS_i32_lt_s);
                GetEmitter()->emitIns(INS_i32_or);
            }
            genJumpToThrowHlpBlk(SCK_OVERFLOW);
            break;
        }

        default:
            unreached();
    }
}

//------------------------------------------------------------------------
// genFloatToIntCast: Generate code for a floating point to integer cast
//
// Arguments:
//    tree - The GT_CAST node for the float-to-int cast operation
//
// Notes:
//    Handles casts from TYP_FLOAT/TYP_DOUBLE to TYP_INT/TYP_LONG.
//    Uses saturating truncation instructions (trunc_sat) which clamp
//    out-of-range values rather than trapping.
//
void CodeGen::genFloatToIntCast(GenTree* tree)
{
    // Overflow checks for floating->integral should be handled on import
    // by converting to helper calls like CORINFO_HELP_DBL2*_OVF (see fgCastRequiresHelper).
    assert(!tree->gtOverflow());

    var_types   toType     = tree->TypeGet();
    var_types   fromType   = tree->AsCast()->CastOp()->TypeGet();
    bool        isUnsigned = varTypeIsUnsigned(tree->AsCast()->CastToType());
    instruction ins        = INS_none;
    assert(varTypeIsFloating(fromType) && (toType == TYP_INT || toType == TYP_LONG));

    genConsumeOperands(tree->AsCast());

    switch (PackTypes(fromType, toType))
    {
        case PackTypes(TYP_FLOAT, TYP_INT):
            ins = isUnsigned ? INS_i32_trunc_sat_f32_u : INS_i32_trunc_sat_f32_s;
            break;
        case PackTypes(TYP_DOUBLE, TYP_INT):
            ins = isUnsigned ? INS_i32_trunc_sat_f64_u : INS_i32_trunc_sat_f64_s;
            break;
        case PackTypes(TYP_FLOAT, TYP_LONG):
            ins = isUnsigned ? INS_i64_trunc_sat_f32_u : INS_i64_trunc_sat_f32_s;
            break;
        case PackTypes(TYP_DOUBLE, TYP_LONG):
            ins = isUnsigned ? INS_i64_trunc_sat_f64_u : INS_i64_trunc_sat_f64_s;
            break;
        default:
            unreached();
    }

    GetEmitter()->emitIns(ins);
    WasmProduceReg(tree);
}

//------------------------------------------------------------------------
// genIntToFloatCast: Generate code for an integer to floating point cast
//
// Arguments:
//    tree - The GT_CAST node for the int-to-float cast operation
//
// Notes:
//    Handles casts from TYP_INT/TYP_LONG to TYP_FLOAT/TYP_DOUBLE.
//
void CodeGen::genIntToFloatCast(GenTree* tree)
{
    assert(tree->OperIs(GT_CAST));
    assert(!tree->gtOverflow());

    GenTreeCast* cast     = tree->AsCast();
    var_types    toType   = tree->TypeGet();
    var_types    fromType = genActualType(cast->CastOp()->TypeGet());
    instruction  ins      = INS_none;

    genConsumeOperands(cast);

    switch (PackTypes(toType, fromType))
    {
        case PackTypes(TYP_FLOAT, TYP_INT):
            ins = cast->IsUnsigned() ? INS_f32_convert_u_i32 : INS_f32_convert_s_i32;
            break;
        case PackTypes(TYP_DOUBLE, TYP_INT):
            ins = cast->IsUnsigned() ? INS_f64_convert_u_i32 : INS_f64_convert_s_i32;
            break;
        case PackTypes(TYP_FLOAT, TYP_LONG):
            ins = cast->IsUnsigned() ? INS_f32_convert_u_i64 : INS_f32_convert_s_i64;
            break;
        case PackTypes(TYP_DOUBLE, TYP_LONG):
            ins = cast->IsUnsigned() ? INS_f64_convert_u_i64 : INS_f64_convert_s_i64;
            break;
        default:
            unreached();
    }

    GetEmitter()->emitIns(ins);
    WasmProduceReg(tree);
}

//------------------------------------------------------------------------
// genFloatToFloatCast: Generate code for a float to float cast
//
// Arguments:
//    tree - The GT_CAST node for the float-to-float cast operation
//
void CodeGen::genFloatToFloatCast(GenTree* tree)
{
    var_types   toType   = tree->TypeGet();
    var_types   fromType = tree->AsCast()->CastOp()->TypeGet();
    instruction ins      = INS_none;

    genConsumeOperands(tree->AsCast());

    switch (PackTypes(toType, fromType))
    {
        case PackTypes(TYP_FLOAT, TYP_DOUBLE):
            ins = INS_f32_demote_f64;
            break;
        case PackTypes(TYP_DOUBLE, TYP_FLOAT):
            ins = INS_f64_promote_f32;
            break;
        case PackTypes(TYP_FLOAT, TYP_FLOAT):
        case PackTypes(TYP_DOUBLE, TYP_DOUBLE):
            ins = INS_none;
            break;
        default:
            unreached();
    }

    if (ins != INS_none)
    {
        GetEmitter()->emitIns(ins);
    }
    WasmProduceReg(tree);
}

//------------------------------------------------------------------------
// genCodeForBinary: Generate code for a binary arithmetic operator
//
// Arguments:
//    treeNode - The binary operation for which we are generating code.
//
void CodeGen::genCodeForBinary(GenTreeOp* treeNode)
{
    if (treeNode->gtOverflowEx())
    {
        genCodeForBinaryOverflow(treeNode);
        return;
    }

    genConsumeOperands(treeNode);

    instruction ins;
    switch (PackOperAndType(treeNode->OperGet(), treeNode->TypeGet()))
    {
        case PackOperAndType(GT_ADD, TYP_INT):
            ins = INS_i32_add;
            break;
        case PackOperAndType(GT_ADD, TYP_LONG):
            ins = INS_i64_add;
            break;
        case PackOperAndType(GT_ADD, TYP_FLOAT):
            ins = INS_f32_add;
            break;
        case PackOperAndType(GT_ADD, TYP_DOUBLE):
            ins = INS_f64_add;
            break;

        case PackOperAndType(GT_SUB, TYP_INT):
            ins = INS_i32_sub;
            break;
        case PackOperAndType(GT_SUB, TYP_LONG):
            ins = INS_i64_sub;
            break;
        case PackOperAndType(GT_SUB, TYP_FLOAT):
            ins = INS_f32_sub;
            break;
        case PackOperAndType(GT_SUB, TYP_DOUBLE):
            ins = INS_f64_sub;
            break;

        case PackOperAndType(GT_MUL, TYP_INT):
            ins = INS_i32_mul;
            break;
        case PackOperAndType(GT_MUL, TYP_LONG):
            ins = INS_i64_mul;
            break;
        case PackOperAndType(GT_MUL, TYP_FLOAT):
            ins = INS_f32_mul;
            break;
        case PackOperAndType(GT_MUL, TYP_DOUBLE):
            ins = INS_f64_mul;
            break;

        case PackOperAndType(GT_AND, TYP_INT):
            ins = INS_i32_and;
            break;
        case PackOperAndType(GT_AND, TYP_LONG):
            ins = INS_i64_and;
            break;

        case PackOperAndType(GT_OR, TYP_INT):
            ins = INS_i32_or;
            break;
        case PackOperAndType(GT_OR, TYP_LONG):
            ins = INS_i64_or;
            break;

        case PackOperAndType(GT_XOR, TYP_INT):
            ins = INS_i32_xor;
            break;
        case PackOperAndType(GT_XOR, TYP_LONG):
            ins = INS_i64_xor;
            break;

        default:
            unreached();
    }

    GetEmitter()->emitIns(ins);
    WasmProduceReg(treeNode);
}

//------------------------------------------------------------------------
// genCodeForBinaryOverflow: Generate code for a binary arithmetic operator
//   with overflow checking
//
// Arguments:
//    treeNode - The binary operation for which we are generating code.
//
void CodeGen::genCodeForBinaryOverflow(GenTreeOp* treeNode)
{
    assert(treeNode->gtOverflow());
    assert(varTypeIsIntegral(treeNode->TypeGet()));

    // TODO-WASM-CQ: consider using helper calls for all these cases

    genConsumeOperands(treeNode);

    const bool    is64BitOp = treeNode->TypeIs(TYP_LONG);
    InternalRegs* regs      = internalRegisters.GetAll(treeNode);
    regNumber     op1Reg    = GetMultiUseOperandReg(treeNode->gtGetOp1());
    regNumber     op2Reg    = GetMultiUseOperandReg(treeNode->gtGetOp2());

    switch (treeNode->OperGet())
    {
        case GT_ADD:
        {
            // We require an internal register.
            assert(regs->Count() == 1);
            regNumber resultReg = regs->Extract();
            assert(WasmRegToType(resultReg) == TypeToWasmValueType(treeNode->TypeGet()));

            GetEmitter()->emitIns(is64BitOp ? INS_i64_add : INS_i32_add);

            if (treeNode->IsUnsigned())
            {
                // Unsigned add overflows iff the result is less than op1 (unsigned compare).
                GetEmitter()->emitIns_I(INS_local_tee, emitActualTypeSize(treeNode), WasmRegToIndex(resultReg));
                genEmitLocalGet(op1Reg, treeNode->TypeGet());
                GetEmitter()->emitIns(is64BitOp ? INS_i64_lt_u : INS_i32_lt_u);
                genJumpToThrowHlpBlk(SCK_OVERFLOW);
            }
            else
            {
                GetEmitter()->emitIns_I(INS_local_set, emitActualTypeSize(treeNode), WasmRegToIndex(resultReg));
                // See if addends had the same sign. XOR leaves a non-negative result if they had the same sign.
                genEmitLocalGet(op1Reg, treeNode->TypeGet());
                genEmitLocalGet(op2Reg, treeNode->TypeGet());
                GetEmitter()->emitIns(is64BitOp ? INS_i64_xor : INS_i32_xor);

                // TODO-WASM-CQ: consider branchless alternative here (and for sub)
                GetEmitter()->emitIns_I(is64BitOp ? INS_i64_const : INS_i32_const, emitActualTypeSize(treeNode), 0);
                GetEmitter()->emitIns(is64BitOp ? INS_i64_ge_s : INS_i32_ge_s);
                genEmitIf();
                {
                    // Operands have the same sign. If the sum has a different sign, then the add overflowed.
                    GetEmitter()->emitIns_I(INS_local_get, emitActualTypeSize(treeNode), WasmRegToIndex(resultReg));
                    genEmitLocalGet(op1Reg, treeNode->TypeGet());
                    GetEmitter()->emitIns(is64BitOp ? INS_i64_xor : INS_i32_xor);
                    GetEmitter()->emitIns_I(is64BitOp ? INS_i64_const : INS_i32_const, emitActualTypeSize(treeNode), 0);
                    GetEmitter()->emitIns(is64BitOp ? INS_i64_lt_s : INS_i32_lt_s);
                    genJumpToThrowHlpBlk(SCK_OVERFLOW);
                }
                genEmitEndIf();
            }
            GetEmitter()->emitIns_I(INS_local_get, emitActualTypeSize(treeNode), WasmRegToIndex(resultReg));
            break;
        }

        case GT_SUB:
        {
            // We require an internal register.
            assert(regs->Count() == 1);
            regNumber resultReg = regs->Extract();
            assert(WasmRegToType(resultReg) == TypeToWasmValueType(treeNode->TypeGet()));

            // Subtract and save the difference
            GetEmitter()->emitIns(is64BitOp ? INS_i64_sub : INS_i32_sub);
            GetEmitter()->emitIns_I(INS_local_set, emitActualTypeSize(treeNode), WasmRegToIndex(resultReg));

            if (treeNode->IsUnsigned())
            {
                // Unsigned sub overflows iff op1 is less than op2 (unsigned compare).
                genEmitLocalGet(op1Reg, treeNode->TypeGet());
                genEmitLocalGet(op2Reg, treeNode->TypeGet());
                GetEmitter()->emitIns(is64BitOp ? INS_i64_lt_u : INS_i32_lt_u);
                genJumpToThrowHlpBlk(SCK_OVERFLOW);
            }
            else
            {
                // See if operands had a different sign. XOR leaves a negative result if they had different signs.
                genEmitLocalGet(op1Reg, treeNode->TypeGet());
                genEmitLocalGet(op2Reg, treeNode->TypeGet());
                GetEmitter()->emitIns(is64BitOp ? INS_i64_xor : INS_i32_xor);
                GetEmitter()->emitIns_I(is64BitOp ? INS_i64_const : INS_i32_const, emitActualTypeSize(treeNode), 0);
                GetEmitter()->emitIns(is64BitOp ? INS_i64_lt_s : INS_i32_lt_s);
                genEmitIf();
                {
                    // Operands have different signs. If the difference has a different sign than op1, then the
                    // subtraction overflowed.
                    GetEmitter()->emitIns_I(INS_local_get, emitActualTypeSize(treeNode), WasmRegToIndex(resultReg));
                    genEmitLocalGet(op1Reg, treeNode->TypeGet());
                    GetEmitter()->emitIns(is64BitOp ? INS_i64_xor : INS_i32_xor);
                    GetEmitter()->emitIns_I(is64BitOp ? INS_i64_const : INS_i32_const, emitActualTypeSize(treeNode), 0);
                    GetEmitter()->emitIns(is64BitOp ? INS_i64_lt_s : INS_i32_lt_s);
                    genJumpToThrowHlpBlk(SCK_OVERFLOW);
                }
                genEmitEndIf();
            }
            GetEmitter()->emitIns_I(INS_local_get, emitActualTypeSize(treeNode), WasmRegToIndex(resultReg));
            break;
        }

        case GT_MUL:
        {
            if (is64BitOp)
            {
                assert(!"64 bit multiply with overflow should have been transformed into a helper call by morph");
            }

            // We require an I64 internal register
            assert(regs->Count() == 1);
            regNumber wideReg = regs->Extract();
            assert(WasmRegToType(wideReg) == WasmValueType::I64);

            // 32 bit multiply... check by doing a 64 bit multiply and then range-checking the result
            const bool isUnsigned = treeNode->IsUnsigned();
            // Both operands are on the stack as I32. Drop the second, extend the first, then extend the second.
            //
            // TODO-WASM-CQ: consider transforming this to a (u)long multiply plus a checked cast, either in morph or
            // lower.
            GetEmitter()->emitIns(INS_drop);
            GetEmitter()->emitIns(isUnsigned ? INS_i64_extend_u_i32 : INS_i64_extend_s_i32);
            genEmitLocalGet(op2Reg, treeNode->TypeGet());
            GetEmitter()->emitIns(isUnsigned ? INS_i64_extend_u_i32 : INS_i64_extend_s_i32);
            GetEmitter()->emitIns(INS_i64_mul);

            // Save the wide result, and then overflow check it.
            GetEmitter()->emitIns_I(INS_local_tee, EA_8BYTE, WasmRegToIndex(wideReg));

            if (isUnsigned)
            {
                // For unsigned multiply, we just need to check if the result is greater than UINT32_MAX.
                GetEmitter()->emitIns_I(INS_i64_const, EA_8BYTE, UINT32_MAX);
                GetEmitter()->emitIns(INS_i64_gt_u);
                genJumpToThrowHlpBlk(SCK_OVERFLOW);
            }
            else
            {
                GetEmitter()->emitIns(INS_i64_extend32_s);
                GetEmitter()->emitIns_I(INS_local_get, EA_8BYTE, WasmRegToIndex(wideReg));
                GetEmitter()->emitIns(INS_i64_ne);
                genJumpToThrowHlpBlk(SCK_OVERFLOW);
            }

            // If the check succeeds, the multiplication result is in range for a 32-bit int.
            // We just need to return the low 32 bits of the result.
            GetEmitter()->emitIns_I(INS_local_get, EA_8BYTE, WasmRegToIndex(wideReg));
            GetEmitter()->emitIns(INS_i32_wrap_i64);

            break;
        }

        default:
            unreached();
            break;
    }

    WasmProduceReg(treeNode);
}

//------------------------------------------------------------------------
// genCodeForDivMod: Generate code for a division or modulus operator
//
// Arguments:
//    treeNode - The division or modulus operation for which we are generating code.
//
void CodeGen::genCodeForDivMod(GenTreeOp* treeNode)
{
    genConsumeOperands(treeNode);

    if (!varTypeIsFloating(treeNode->TypeGet()))
    {
        ExceptionSetFlags exSetFlags = treeNode->OperExceptions(m_compiler);
        bool              is64BitOp  = treeNode->TypeIs(TYP_LONG);
        emitAttr          size       = is64BitOp ? EA_8BYTE : EA_4BYTE;

        // (AnyVal / 0) => DivideByZeroException.
        GenTree*  divisor    = treeNode->gtGetOp2();
        regNumber divisorReg = REG_NA;
        if ((exSetFlags & ExceptionSetFlags::DivideByZeroException) != ExceptionSetFlags::None)
        {
            divisorReg = GetMultiUseOperandReg(divisor);
            genEmitLocalGet(divisorReg, treeNode->TypeGet());
            GetEmitter()->emitIns(is64BitOp ? INS_i64_eqz : INS_i32_eqz);
            genJumpToThrowHlpBlk(SCK_DIV_BY_ZERO);
        }

        // (MinInt / -1) => ArithmeticException.
        if ((exSetFlags & ExceptionSetFlags::ArithmeticException) != ExceptionSetFlags::None)
        {
            if (divisorReg == REG_NA)
            {
                divisorReg = GetMultiUseOperandReg(divisor);
            }
            genEmitLocalGet(divisorReg, treeNode->TypeGet());
            GetEmitter()->emitIns_I(is64BitOp ? INS_i64_const : INS_i32_const, size, -1);
            GetEmitter()->emitIns(is64BitOp ? INS_i64_eq : INS_i32_eq);

            regNumber dividendReg = GetMultiUseOperandReg(treeNode->gtGetOp1());
            genEmitLocalGet(dividendReg, treeNode->TypeGet());
            GetEmitter()->emitIns_I(is64BitOp ? INS_i64_const : INS_i32_const, size, is64BitOp ? INT64_MIN : INT32_MIN);
            GetEmitter()->emitIns(is64BitOp ? INS_i64_eq : INS_i32_eq);

            // Wasm relops always produce i32 results
            //
            GetEmitter()->emitIns(INS_i32_and);
            genJumpToThrowHlpBlk(SCK_ARITH_EXCPN);
        }
    }

    instruction ins;
    switch (PackOperAndType(treeNode->OperGet(), treeNode->TypeGet()))
    {
        case PackOperAndType(GT_DIV, TYP_INT):
            ins = INS_i32_div_s;
            break;
        case PackOperAndType(GT_DIV, TYP_LONG):
            ins = INS_i64_div_s;
            break;
        case PackOperAndType(GT_DIV, TYP_FLOAT):
            ins = INS_f32_div;
            break;
        case PackOperAndType(GT_DIV, TYP_DOUBLE):
            ins = INS_f64_div;
            break;

        case PackOperAndType(GT_UDIV, TYP_INT):
            ins = INS_i32_div_u;
            break;
        case PackOperAndType(GT_UDIV, TYP_LONG):
            ins = INS_i64_div_u;
            break;

        case PackOperAndType(GT_MOD, TYP_INT):
            ins = INS_i32_rem_s;
            break;
        case PackOperAndType(GT_MOD, TYP_LONG):
            ins = INS_i64_rem_s;
            break;

        case PackOperAndType(GT_UMOD, TYP_INT):
            ins = INS_i32_rem_u;
            break;
        case PackOperAndType(GT_UMOD, TYP_LONG):
            ins = INS_i64_rem_u;
            break;

        default:
            unreached();
    }

    GetEmitter()->emitIns(ins);
    WasmProduceReg(treeNode);
}

//------------------------------------------------------------------------
// genCodeForConstant: Generate code for an integer or floating point constant
//
// Arguments:
//    treeNode - The constant.
//
void CodeGen::genCodeForConstant(GenTree* treeNode)
{
    instruction    ins  = INS_none;
    cnsval_ssize_t bits = 0;
    var_types      type = treeNode->TypeIs(TYP_REF, TYP_BYREF) ? TYP_I_IMPL : treeNode->TypeGet();
    static_assert(sizeof(cnsval_ssize_t) >= sizeof(double));

    GenTreeIntConCommon* icon = nullptr;
    if ((type == TYP_INT) || (type == TYP_LONG))
    {
        icon = treeNode->AsIntConCommon();
        if (icon->IsIconHandle())
        {
            // Handles need linker relocations for NativeAOT or image-relative relocations for R2R.
            // A handle only reaches here without needing a reloc under a cross-VM SuperPMI replay.
            assert(icon->ImmedValNeedsReloc(m_compiler) || m_compiler->RunningSuperPmiReplay());
            GetEmitter()->emitAddressConstant((void*)icon->IntegralValue());
            WasmProduceReg(treeNode);
            return;
        }
        else
        {
            bits = icon->IntegralValue();
        }
    }

    if (ins == INS_none)
    {
        switch (type)
        {
            case TYP_INT:
            {
                ins = INS_i32_const;
                // Wasm integers are sign-agnostic: any 32-bit pattern is a valid i32.const,
                // reduced to its signed value for a canonical SLEB128 encoding. Truncating
                // through uint32_t keeps the low-32-bit reduction well-defined.
                assert(FitsIn<INT32>(bits) || FitsIn<UINT32>(bits));
                bits = static_cast<int32_t>(static_cast<uint32_t>(bits));
                break;
            }
            case TYP_LONG:
            {
                ins = INS_i64_const;
                break;
            }
            case TYP_FLOAT:
            {
                ins                  = INS_f32_const;
                GenTreeDblCon* con   = treeNode->AsDblCon();
                double         value = con->DconValue();
                memcpy(&bits, &value, sizeof(double));
                break;
            }
            case TYP_DOUBLE:
            {
                ins                  = INS_f64_const;
                GenTreeDblCon* con   = treeNode->AsDblCon();
                double         value = con->DconValue();
                memcpy(&bits, &value, sizeof(double));
                break;
            }
            default:
                unreached();
        }
    }

    // The IF_ for the selected instruction, i.e. IF_F64, determines how these bits are emitted
    GetEmitter()->emitIns_I(ins, emitTypeSize(treeNode), bits);
    WasmProduceReg(treeNode);
}

#ifdef FEATURE_SIMD
void CodeGen::genCodeForVectorConstant(GenTree* treeNode)
{
    assert(treeNode->IsCnsVec());
    GenTreeVecCon* vecCon = treeNode->AsVecCon();

    uint8_t bytes[16] = {};
    memcpy(bytes, &vecCon->gtSimdVal, genTypeSize(vecCon->TypeGet()));

    // There is only one type variant for v128.const, v128.const <byte[16]>
    // and the bytes are reinterpreted according to whichever operation consumes the value.
    GetEmitter()->emitIns_V128Imm(INS_v128_const, bytes);
    WasmProduceReg(treeNode);
}
#endif

//------------------------------------------------------------------------
// genCodeForShift: Generate code for a shift or rotate operator
//
// Arguments:
//    tree - The shift or rotate operation for which we are generating code.
//
void CodeGen::genCodeForShift(GenTree* tree)
{
    assert(tree->OperIsShiftOrRotate());

    GenTreeOp* treeNode = tree->AsOp();
    genConsumeOperands(treeNode);

    // The shift operand width in IR is always int or small int, so the operand's actual type should be TYP_INT.
    // However, the WASM operations have the same widths for both the shift and shiftee so
    // the shift width may need to be zero-extended if the shift result type is TYP_LONG.
    if (treeNode->TypeIs(TYP_LONG))
    {
        assert(genActualType(treeNode->gtGetOp2()->TypeGet()) == TYP_INT);
        // Zero-extend the shift amount to 64 bits for long shifts/rotates.
        // Wasteful if the amount was a constant, perhaps we should contain it if so.
        GetEmitter()->emitIns(INS_i64_extend_u_i32);
    }

    instruction ins;
    switch (PackOperAndType(treeNode->OperGet(), treeNode->TypeGet()))
    {
        case PackOperAndType(GT_LSH, TYP_INT):
            ins = INS_i32_shl;
            break;
        case PackOperAndType(GT_LSH, TYP_LONG):
            ins = INS_i64_shl;
            break;

        case PackOperAndType(GT_RSH, TYP_INT):
            ins = INS_i32_shr_s;
            break;
        case PackOperAndType(GT_RSH, TYP_LONG):
            ins = INS_i64_shr_s;
            break;

        case PackOperAndType(GT_RSZ, TYP_INT):
            ins = INS_i32_shr_u;
            break;
        case PackOperAndType(GT_RSZ, TYP_LONG):
            ins = INS_i64_shr_u;
            break;

        case PackOperAndType(GT_ROL, TYP_INT):
            ins = INS_i32_rotl;
            break;
        case PackOperAndType(GT_ROL, TYP_LONG):
            ins = INS_i64_rotl;
            break;

        case PackOperAndType(GT_ROR, TYP_INT):
            ins = INS_i32_rotr;
            break;
        case PackOperAndType(GT_ROR, TYP_LONG):
            ins = INS_i64_rotr;
            break;

        default:
            unreached();
    }

    GetEmitter()->emitIns(ins);
    WasmProduceReg(treeNode);
}

//----------------------------------------------------------------------
// genCodeForBitCast - Generate code for a GT_BITCAST that is not contained
//
// Arguments
//    tree - the GT_BITCAST for which we're generating code
//
void CodeGen::genCodeForBitCast(GenTreeOp* tree)
{
    assert(tree->OperIs(GT_BITCAST));

    if (tree->gtGetOp1()->isContained())
    {
        assert(tree->gtGetOp1()->OperIs(GT_LCL_VAR));
        genCodeForLclVar(tree->gtGetOp1()->AsLclVar());
    }
    else
    {
        genConsumeOperands(tree);
    }

    var_types toType   = tree->TypeGet();
    var_types fromType = genActualType(tree->gtGetOp1()->TypeGet());
    assert(toType == genActualType(tree));

    instruction ins = WasmBitCastInstruction(toType, fromType);

    if (ins != INS_none)
    {
        GetEmitter()->emitIns(ins);
    }
    WasmProduceReg(tree);
}

//------------------------------------------------------------------------
// genCkfinite: Generate code for ckfinite opcode.
//
// Arguments:
//    treeNode - The GT_CKFINITE node
//
// Notes:
//    op1 is expected to be marked MultiplyUsed so that its producer tees
//    its value into a temporary local. That lets us re-read the value
//    after the finiteness check by emitting a "local.get".
//
void CodeGen::genCkfinite(GenTree* treeNode)
{
    assert(treeNode->OperIs(GT_CKFINITE));

    GenTree*  op1        = treeNode->AsOp()->gtOp1;
    var_types targetType = treeNode->TypeGet();
    assert(varTypeIsFloating(targetType));

    genConsumeOperands(treeNode->AsOp());

    // op1's producer emitted "local.tee" via "WasmProduceReg" (because
    // op1 was flagged as MultiplyUsed during lowering), leaving its
    // value both on the wasm operand stack and in a temporary local.
    // We re-read the local below to feed the finiteness check; the
    // value on the stack will flow through as the result of GT_CKFINITE.
    //
    regNumber op1Reg = GetMultiUseOperandReg(op1);
    emitter*  emit   = GetEmitter();

    // Compute "!(|x| < +Inf)". This is true for NaN and +/-Inf, false for
    // every finite value. We rely on wasm's IEEE-754 comparison semantics
    // where any comparison involving a NaN (other than "ne") returns 0.
    //
    // Note: IF_F32/IF_F64 both expect the +Inf constant as a double bit
    // pattern (IF_F32 reinterprets and truncates to float during emission).
    //
    const int64_t infBits = 0x7FF0000000000000LL;
    if (targetType == TYP_FLOAT)
    {
        emit->emitIns_I(INS_local_get, EA_4BYTE, WasmRegToIndex(op1Reg));
        emit->emitIns(INS_f32_abs);
        emit->emitIns_I(INS_f32_const, EA_4BYTE, infBits);
        emit->emitIns(INS_f32_lt);
    }
    else
    {
        assert(targetType == TYP_DOUBLE);
        emit->emitIns_I(INS_local_get, EA_8BYTE, WasmRegToIndex(op1Reg));
        emit->emitIns(INS_f64_abs);
        emit->emitIns_I(INS_f64_const, EA_8BYTE, infBits);
        emit->emitIns(INS_f64_lt);
    }
    emit->emitIns(INS_i32_eqz);

    // If "!(|x| < +Inf)", the value is NaN or +/-Inf; throw. The wasm
    // stack underneath the predicate (including op1's value) is preserved
    // on the fall-through path.
    //
    genJumpToThrowHlpBlk(SCK_ARITH_EXCPN);

    // op1's value is still on top of the wasm operand stack; produce it
    // as the result of the GT_CKFINITE node.
    //
    WasmProduceReg(treeNode);
}

//------------------------------------------------------------------------
// genCodeForNegNot: Generate code for a neg/not
//
// Arguments:
//    tree - neg/not tree node
//
void CodeGen::genCodeForNegNot(GenTreeOp* tree)
{
    assert(tree->OperIs(GT_NEG, GT_NOT));
    genConsumeOperands(tree);

    instruction ins;
    switch (PackOperAndType(tree->OperGet(), tree->TypeGet()))
    {
        case PackOperAndType(GT_NOT, TYP_INT):
            GetEmitter()->emitIns_I(INS_i32_const, emitTypeSize(tree), -1);
            ins = INS_i32_xor;
            break;
        case PackOperAndType(GT_NOT, TYP_LONG):
            GetEmitter()->emitIns_I(INS_i64_const, emitTypeSize(tree), -1);
            ins = INS_i64_xor;
            break;
        case PackOperAndType(GT_NOT, TYP_FLOAT):
        case PackOperAndType(GT_NOT, TYP_DOUBLE):
            unreached();
            break;
        case PackOperAndType(GT_NEG, TYP_INT):
        case PackOperAndType(GT_NEG, TYP_LONG):
            // We cannot easily emit i32.sub(0, x) here since x is already on the stack.
            // So we transform these to SUB in lower.
            unreached();
            break;
        case PackOperAndType(GT_NEG, TYP_FLOAT):
            ins = INS_f32_neg;
            break;
        case PackOperAndType(GT_NEG, TYP_DOUBLE):
            ins = INS_f64_neg;
            break;

        default:
            unreached();
            break;
    }

    GetEmitter()->emitIns(ins);
    WasmProduceReg(tree);
}

//---------------------------------------------------------------------
// genJumpToThrowHlpBlk - generate code to invoke a throw helper call
//
// Arguments:
//    codeKind -- kind of throw helper call needed
//
// Notes:
//    On entry the predicate (an i32) for the throw helper must be on top of the
//    Wasm stack. An exception is thrown if the predicate is non-zero.
//
//    Additional values may be present on the stack underneath the predicate; only
//    the predicate is consumed on the fall-through path, so those values remain
//    available to the caller. On the throwing path the stack is unwound to the
//    target helper block (or discarded by 'unreachable' inside the inline 'if'),
//    so anything underneath is irrelevant in that case.
//
void CodeGen::genJumpToThrowHlpBlk(SpecialCodeKind codeKind)
{
    if (m_compiler->fgUseThrowHelperBlocks())
    {
        Compiler::AddCodeDsc* const add = m_compiler->fgGetExcptnTarget(codeKind, m_compiler->compCurBB);
        assert(add != nullptr);
        assert(add->acdUsed);
        inst_JMP(EJ_jmpif, add->acdDstBlk);
    }
    else
    {
        genEmitIf();
        // Throw helpers are managed so we need to push the stack pointer before genEmitHelperCall.
        GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());
        genEmitHelperCall(m_compiler->acdHelper(codeKind), 0, EA_UNKNOWN);
        genEmitEndIf();
    }
}

//---------------------------------------------------------------------
// genCodeForNullCheck - generate code for a GT_NULLCHECK node
//
// Arguments:
//    tree - the GT_NULLCHECK node
//
void CodeGen::genCodeForNullCheck(GenTreeIndir* tree)
{
    genConsumeAddress(tree->Addr());

    // In some cases the indir may not fault.
    // Tolerate these.
    //
    if ((tree->gtFlags & GTF_IND_NONFAULTING) == 0)
    {
        genEmitNullCheck(REG_NA, tree->Addr()->TypeGet());
    }
    else
    {
        GetEmitter()->emitIns(INS_drop);
    }
}

//---------------------------------------------------------------------
// genEmitNullCheck - generate code for a null check
//
// Arguments:
//    regNum - register to check, or REG_NA if value to check is on the stack
//
void CodeGen::genEmitNullCheck(regNumber reg, var_types refType)
{
    if (reg != REG_NA)
    {
        genEmitLocalGet(reg, WasmValueType::I);
    }

    if (refType == TYP_REF)
    {
        // Object references can be compared directly with null
        GetEmitter()->emitIns(INS_I_eqz);
    }
    else
    {
        // Otherwise, we have a byref or integer-type address which needs to be compared to
        // the max unchecked null offset
        assert(refType == TYP_BYREF || varTypeIsIntOrI(refType));
        GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, m_compiler->compMaxUncheckedOffsetForNullObject);
        GetEmitter()->emitIns(INS_I_le_u);
    }

    genJumpToThrowHlpBlk(SCK_NULL_CHECK);
}

//------------------------------------------------------------------------
// genRangeCheck - generate code for a GT_BOUNDS_CHECK node
//
// Arguments:
//    tree - the GT_BOUNDS_CHECK node
//
// Notes:
//    Incoming stack args are index; length (tos).
//
void CodeGen::genRangeCheck(GenTree* tree)
{
    assert(tree->OperIs(GT_BOUNDS_CHECK));
    GenTreeBoundsChk* boundsCheck = tree->AsBoundsChk();
    genConsumeOperands(boundsCheck);
#ifdef FEATURE_SIMD
    if (varTypeIsSIMD(boundsCheck->GetIndex()->TypeGet()))
    {
        GetEmitter()->emitIns(INS_i8x16_splat);
        GetEmitter()->emitIns(INS_i8x16_ge_u);
        GetEmitter()->emitIns(INS_v128_any_true);
    }
    else
#endif
    {
        GetEmitter()->emitIns(INS_I_ge_u);
    }

    genJumpToThrowHlpBlk(boundsCheck->gtThrowKind);
}

//------------------------------------------------------------------------
// genCodeForIndexAddr: Produce code for a GT_INDEX_ADDR node.
//
// Arguments:
//    tree - the GT_INDEX_ADDR node
//
void CodeGen::genCodeForIndexAddr(GenTreeIndexAddr* node)
{
    genConsumeOperands(node);

    GenTree* const base  = node->Arr();
    GenTree* const index = node->Index();

    assert(varTypeIsIntegral(index->TypeGet()));
    var_types indexType = genActualType(index->TypeGet());

    // Generate the bounds check if necessary.
    //
    if (node->IsBoundsChecked())
    {
        regNumber baseReg  = GetMultiUseOperandReg(base);
        regNumber indexReg = GetMultiUseOperandReg(index);

        // fetch index
        genEmitLocalGet(indexReg, index->TypeGet());

        // fetch array length
        genEmitLocalGet(baseReg, WasmValueType::I);
        GetEmitter()->emitIns_I(ins_Load(TYP_INT), EA_4BYTE, node->gtLenOffset);

        // If index type is long, extend array length
        if (indexType == TYP_LONG)
        {
            GetEmitter()->emitIns(INS_i64_extend_u_i32);
        }

        // compare
        GetEmitter()->emitIns(indexType == TYP_LONG ? INS_i64_ge_u : INS_i32_ge_u);

        genJumpToThrowHlpBlk(SCK_RNGCHK_FAIL);
    }

    // Zero extend index if necessary.
    if (indexType != TYP_I_IMPL)
    {
        GetEmitter()->emitIns(INS_i64_extend_u_i32);
    }

    // Result is the address of the array element.
    unsigned const scale = node->gtElemSize;

    if (scale > 1)
    {
        GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, scale);
        GetEmitter()->emitIns(INS_I_mul);
    }
    GetEmitter()->emitIns(INS_I_add);
    GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, node->gtElemOffset);
    GetEmitter()->emitIns(INS_I_add);
    WasmProduceReg(node);
}

//------------------------------------------------------------------------
// genLeaInstruction: Produce code for a GT_LEA node.
//
// Arguments:
//    lea - the node
//
void CodeGen::genLeaInstruction(GenTreeAddrMode* lea)
{
    genConsumeOperands(lea);
    assert(lea->HasIndex() || lea->HasBase());

    if (lea->HasIndex())
    {
        unsigned const scale = lea->gtScale;

        if (scale > 1)
        {
            GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, scale);
            GetEmitter()->emitIns(INS_I_mul);
        }

        if (lea->HasBase())
        {
            GetEmitter()->emitIns(INS_I_add);
        }
    }

    const int offset = lea->Offset();

    if (offset != 0)
    {
        GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, offset);
        GetEmitter()->emitIns(INS_I_add);
    }

    WasmProduceReg(lea);
}

//------------------------------------------------------------------------
// PackIntrinsicAndType: Pack a intrinsic and var_types into a uint32_t
//
// Arguments:
//    ni - a NamedIntrinsic to pack
//    type - a var_types to pack
//
// Return Value:
//    intrinsic and type packed into an integer that can be used as a switch value/case
//
static constexpr uint32_t PackIntrinsicAndType(NamedIntrinsic ni, var_types type)
{
    if ((type == TYP_BYREF) || (type == TYP_REF))
    {
        type = TYP_I_IMPL;
    }
    const int shift1 = ConstLog2<TYP_COUNT>::value + 1;
    return ((uint32_t)ni << shift1) | ((uint32_t)type);
}

//---------------------------------------------------------------------
// genIntrinsic - generate code for a given intrinsic
//
// Arguments
//    treeNode - the GT_INTRINSIC node
//
// Return value:
//    None
//
void CodeGen::genIntrinsic(GenTreeIntrinsic* treeNode)
{
    genConsumeOperands(treeNode);

    // Handle intrinsics that can be implemented by target-specific instructions
    instruction ins = INS_invalid;

    bool canHaveMixedTypes = false;

    switch (PackIntrinsicAndType(treeNode->gtIntrinsicName, treeNode->TypeGet()))
    {
        case PackIntrinsicAndType(NI_System_Math_Abs, TYP_FLOAT):
            ins = INS_f32_abs;
            break;
        case PackIntrinsicAndType(NI_System_Math_Abs, TYP_DOUBLE):
            ins = INS_f64_abs;
            break;

        case PackIntrinsicAndType(NI_System_Math_Ceiling, TYP_FLOAT):
            ins = INS_f32_ceil;
            break;
        case PackIntrinsicAndType(NI_System_Math_Ceiling, TYP_DOUBLE):
            ins = INS_f64_ceil;
            break;

        case PackIntrinsicAndType(NI_System_Math_Floor, TYP_FLOAT):
            ins = INS_f32_floor;
            break;
        case PackIntrinsicAndType(NI_System_Math_Floor, TYP_DOUBLE):
            ins = INS_f64_floor;
            break;

        case PackIntrinsicAndType(NI_System_Math_Max, TYP_FLOAT):
        case PackIntrinsicAndType(NI_System_Math_MaxNative, TYP_FLOAT):
            ins = INS_f32_max;
            break;
        case PackIntrinsicAndType(NI_System_Math_Max, TYP_DOUBLE):
        case PackIntrinsicAndType(NI_System_Math_MaxNative, TYP_DOUBLE):
            ins = INS_f64_max;
            break;

        case PackIntrinsicAndType(NI_System_Math_Min, TYP_FLOAT):
        case PackIntrinsicAndType(NI_System_Math_MinNative, TYP_FLOAT):
            ins = INS_f32_min;
            break;
        case PackIntrinsicAndType(NI_System_Math_Min, TYP_DOUBLE):
        case PackIntrinsicAndType(NI_System_Math_MinNative, TYP_DOUBLE):
            ins = INS_f64_min;
            break;

        case PackIntrinsicAndType(NI_System_Math_Round, TYP_FLOAT):
            ins = INS_f32_nearest;
            break;
        case PackIntrinsicAndType(NI_System_Math_Round, TYP_DOUBLE):
            ins = INS_f64_nearest;
            break;

        case PackIntrinsicAndType(NI_System_Math_Sqrt, TYP_FLOAT):
            ins = INS_f32_sqrt;
            break;
        case PackIntrinsicAndType(NI_System_Math_Sqrt, TYP_DOUBLE):
            ins = INS_f64_sqrt;
            break;

        case PackIntrinsicAndType(NI_System_Math_Truncate, TYP_FLOAT):
            ins = INS_f32_trunc;
            break;
        case PackIntrinsicAndType(NI_System_Math_Truncate, TYP_DOUBLE):
            ins = INS_f64_trunc;
            break;

        case PackIntrinsicAndType(NI_PRIMITIVE_LeadingZeroCount, TYP_INT):
        case PackIntrinsicAndType(NI_PRIMITIVE_LeadingZeroCount, TYP_LONG):
        case PackIntrinsicAndType(NI_PRIMITIVE_TrailingZeroCount, TYP_INT):
        case PackIntrinsicAndType(NI_PRIMITIVE_TrailingZeroCount, TYP_LONG):
        case PackIntrinsicAndType(NI_PRIMITIVE_PopCount, TYP_INT):
        case PackIntrinsicAndType(NI_PRIMITIVE_PopCount, TYP_LONG):
            canHaveMixedTypes = true;
            break;

        default:
            assert(!"genIntrinsic: Unsupported intrinsic");
            unreached();
    }

    bool needsTruncation = false;
    bool needsExtension  = false;

    if (canHaveMixedTypes)
    {
        var_types treeType    = treeNode->TypeGet();
        var_types operandType = genActualType(treeNode->gtGetOp1()->TypeGet());

        needsTruncation = (operandType == TYP_LONG) && (treeType == TYP_INT);
        needsExtension  = (operandType == TYP_INT) && (treeType == TYP_LONG);

        switch (PackIntrinsicAndType(treeNode->gtIntrinsicName, operandType))
        {
            case PackIntrinsicAndType(NI_PRIMITIVE_LeadingZeroCount, TYP_INT):
                ins = INS_i32_clz;
                break;

            case PackIntrinsicAndType(NI_PRIMITIVE_LeadingZeroCount, TYP_LONG):
                ins = INS_i64_clz;
                break;

            case PackIntrinsicAndType(NI_PRIMITIVE_TrailingZeroCount, TYP_INT):
                ins = INS_i32_ctz;
                break;

            case PackIntrinsicAndType(NI_PRIMITIVE_TrailingZeroCount, TYP_LONG):
                ins = INS_i64_ctz;
                break;

            case PackIntrinsicAndType(NI_PRIMITIVE_PopCount, TYP_INT):
                ins = INS_i32_popcnt;
                break;

            case PackIntrinsicAndType(NI_PRIMITIVE_PopCount, TYP_LONG):
                ins = INS_i64_popcnt;
                break;

            default:
                unreached();
        }
    }

    GetEmitter()->emitIns(ins);

    if (needsTruncation)
    {
        GetEmitter()->emitIns(INS_i32_wrap_i64);
    }
    else if (needsExtension)
    {
        GetEmitter()->emitIns(INS_i64_extend_u_i32);
    }

    WasmProduceReg(treeNode);
}

//------------------------------------------------------------------------
// genCodeForLclAddr: Generates the code for GT_LCL_ADDR.
//
// Arguments:
//    lclAddrNode - the node.
//
void CodeGen::genCodeForLclAddr(GenTreeLclFld* lclAddrNode)
{
    assert(lclAddrNode->OperIs(GT_LCL_ADDR));
    bool     FPBased;
    unsigned lclNum    = lclAddrNode->GetLclNum();
    unsigned lclOffset = lclAddrNode->GetLclOffs();

    GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetFramePointerRegIndex());

    // A folded address contributes its frame offset to the user's memarg instead.
    //
    if (((lclAddrNode->gtLIRFlags & LIR::Flags::FoldedAddr) == LIR::Flags::None) &&
        ((lclOffset != 0) || (m_compiler->lvaFrameAddress(lclNum, &FPBased) != 0)))
    {
        GetEmitter()->emitIns_S(INS_I_const, EA_PTRSIZE, lclNum, lclOffset);
        GetEmitter()->emitIns(INS_I_add);
    }
    WasmProduceReg(lclAddrNode);
}

//------------------------------------------------------------------------
// genCodeForLclFld: Produce code for a GT_LCL_FLD node.
//
// Arguments:
//    tree - the GT_LCL_FLD node
//
void CodeGen::genCodeForLclFld(GenTreeLclFld* tree)
{
    assert(tree->OperIs(GT_LCL_FLD));
    LclVarDsc* varDsc = m_compiler->lvaGetDesc(tree);
    var_types  type   = tree->TypeGet();

    if (type == TYP_SIMD12)
    {
        genLoadLclTypeSimd12(tree);
    }
    else
    {
        GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetFramePointerRegIndex());
        GetEmitter()->emitIns_S(ins_Load(type), emitTypeSize(tree), tree->GetLclNum(), tree->GetLclOffs());
    }
    WasmProduceReg(tree);
}

//------------------------------------------------------------------------
// genCodeForLclVar: Produce code for a GT_LCL_VAR node.
//
// Arguments:
//    tree - the GT_LCL_VAR node
//
void CodeGen::genCodeForLclVar(GenTreeLclVar* tree)
{
    assert(tree->OperIs(GT_LCL_VAR) && !tree->IsMultiReg());
    LclVarDsc* varDsc = m_compiler->lvaGetDesc(tree);

    // Unlike other targets, we can't "reload at the point of use", since that would require inserting instructions
    // into the middle of an already-emitted instruction group. Instead, we order the nodes in a way that obeys the
    // value stack constraints of WASM precisely. However, the liveness tracking is done in the same way as for other
    // targets, hence "WasmProduceReg" is only called for non-candidates.
    if (!varDsc->lvIsRegCandidate())
    {
        var_types type = varDsc->GetRegisterType(tree);

        if (type == TYP_SIMD12)
        {
            genLoadLclTypeSimd12(tree);
        }
        else
        {
            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetFramePointerRegIndex());
            GetEmitter()->emitIns_S(ins_Load(type), emitTypeSize(type), tree->GetLclNum(), 0);
        }
        WasmProduceReg(tree);
    }
    else
    {
        assert(genIsValidReg(varDsc->GetRegNum()));
        var_types type         = varDsc->GetRegisterType(tree);
        unsigned  wasmLclIndex = WasmRegToIndex(varDsc->GetRegNum());
        GetEmitter()->emitIns_I(INS_local_get, emitTypeSize(type), wasmLclIndex);
        // In this case, the resulting tree type may be different from the local var type where the value originates,
        // and so we need an explicit conversion since we can't "load"
        // the value with a different type like we can if the value is on the shadow stack.
        if (tree->TypeIs(TYP_INT) && varDsc->TypeIs(TYP_LONG))
        {
            GetEmitter()->emitIns(INS_i32_wrap_i64);
        }
    }
}

//------------------------------------------------------------------------
// genCodeForStoreLclVar: Produce code for a GT_STORE_LCL_VAR node.
//
// Arguments:
//    tree - the GT_STORE_LCL_VAR node
//
void CodeGen::genCodeForStoreLclVar(GenTreeLclVar* tree)
{
    assert(tree->OperIs(GT_STORE_LCL_VAR));

    GenTree* const op1 = tree->gtGetOp1();
    assert(!op1->IsMultiRegNode());
    genConsumeRegs(op1);

    // We rewrite all stack stores to STOREIND because the address must be first on the operand stack, so here only
    // enregistered locals need to be handled.
    LclVarDsc* varDsc    = m_compiler->lvaGetDesc(tree);
    regNumber  targetReg = tree->GetRegNum();
    var_types  type      = varDsc->GetRegisterType(tree);
    assert(genIsValidReg(targetReg) && varDsc->lvIsRegCandidate());

    GetEmitter()->emitIns_I(INS_local_set, emitTypeSize(type), WasmRegToIndex(targetReg));
    genUpdateLifeStore(tree, targetReg, varDsc);
}

//------------------------------------------------------------------------
// genCodeForPhysReg: Produce code for a PHYSREG node.
//
// Arguments:
//    tree - the GT_PHYSREG node
//
void CodeGen::genCodeForPhysReg(GenTreePhysReg* tree)
{
    assert(genIsValidReg(tree->gtSrcReg));
    GetEmitter()->emitIns_I(INS_local_get, emitActualTypeSize(tree), WasmRegToIndex(tree->gtSrcReg));
    WasmProduceReg(tree);
}

//------------------------------------------------------------------------
// genCodeForFrameSize: Produce code for a GT_FRAME_SIZE node.
//
// Emits an i32/i64 const for compLclFrameSize, which is only known after the
// final frame layout (well after the IR is built).
//
// Arguments:
//    tree - the GT_FRAME_SIZE node
//
void CodeGen::genCodeForFrameSize(GenTree* tree)
{
    assert(tree->OperIs(GT_FRAME_SIZE));
    GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, m_compiler->compLclFrameSize);
    WasmProduceReg(tree);
}

//------------------------------------------------------------------------
// genLoadLclTypeSimd12: Load a TYP_SIMD12 (i.e. Vector3) local into a v128.
//
// Arguments:
//    tree - the GT_LCL_FLD or GT_LCL_VAR node
//
// Notes:
//    Vector3 has no native wasm valtype, so it lives as a v128 with the low 12 bytes
//    populated. The frame address is pushed twice: v128.load64_zero fills lanes 0-1
//    (zeroing the rest) and v128.load32_lane fills lane 2 from bytes 8-11.
//
void CodeGen::genLoadLclTypeSimd12(GenTreeLclVarCommon* tree)
{
    bool fpBased;
    int  frameOffset = m_compiler->lvaFrameAddress(tree->GetLclNum(), &fpBased) + (int)tree->GetLclOffs();
    noway_assert(frameOffset >= 0); // WASM address modes are unsigned.
    assert(fpBased);
    unsigned fpIndex = GetFramePointerRegIndex();
    emitter* emit    = GetEmitter();

    emit->emitIns_I(INS_local_get, EA_PTRSIZE, fpIndex);
    emit->emitIns_I(INS_local_get, EA_PTRSIZE, fpIndex);
    emit->emitIns_I(INS_v128_load64_zero, EA_8BYTE, frameOffset);
    emit->emitIns_MemargLane(INS_v128_load32_lane, EA_4BYTE, frameOffset + 8, 2);
}

//------------------------------------------------------------------------
// genLoadIndTypeSimd12: Load a TYP_SIMD12 (i.e. Vector3) value through an indirection.
//
// Arguments:
//    tree - the GT_IND node
//
// Notes:
//    The address is left on the value stack by prior codegen and is multiply-used, so the
//    trailing v128.load32_lane can re-push it for the upper 4 bytes.
//
void CodeGen::genLoadIndTypeSimd12(GenTreeIndir* tree)
{
    emitter* emit = GetEmitter();

    genEmitLocalGet(GetMultiUseOperandReg(tree->Addr()), WasmValueType::I);
    emit->emitIns_I(INS_v128_load64_zero, EA_8BYTE, 0);
    emit->emitIns_MemargLane(INS_v128_load32_lane, EA_4BYTE, 8, 2);
}

//------------------------------------------------------------------------
// genStoreIndTypeSimd12: Store a TYP_SIMD12 (i.e. Vector3) value through an indirection.
//
// Arguments:
//    tree - the GT_STOREIND node
//
// Notes:
//    On entry the value stack holds [addr, value]. The value is teed into an internal v128
//    local so it survives the low-8 store; the address is then re-materialized to store the
//    upper 4 bytes via a lane store - re-emitting the frame pointer for a LCL_ADDR, or
//    re-pushing the multiply-used address register otherwise.
//
void CodeGen::genStoreIndTypeSimd12(GenTreeStoreInd* tree)
{
    emitter* emit = GetEmitter();
    GenTree* addr = tree->Addr();

    InternalRegs* regs = internalRegisters.GetAll(tree);
    assert(regs->Count() == 1);
    regNumber valReg = regs->Extract();

    emit->emitIns_I(INS_local_tee, EA_16BYTE, WasmRegToIndex(valReg)); // [addr, value]
    emit->emitIns_MemargLane(INS_v128_store64_lane, EA_8BYTE, 0, 0);   // []

    if (addr->OperIs(GT_LCL_ADDR))
    {
        bool fpBased;
        int  frameOffset = m_compiler->lvaFrameAddress(addr->AsLclVarCommon()->GetLclNum(), &fpBased) +
                          (int)addr->AsLclVarCommon()->GetLclOffs();
        noway_assert(frameOffset >= 0); // WASM address modes are unsigned.
        assert(fpBased);
        emit->emitIns_I(INS_local_get, EA_PTRSIZE, GetFramePointerRegIndex());         // [fp]
        emit->emitIns_I(INS_local_get, EA_16BYTE, WasmRegToIndex(valReg));             // [fp, value]
        emit->emitIns_MemargLane(INS_v128_store32_lane, EA_4BYTE, frameOffset + 8, 2); // []
    }
    else
    {
        genEmitLocalGet(GetMultiUseOperandReg(addr), WasmValueType::I);    // [addr]
        emit->emitIns_I(INS_local_get, EA_16BYTE, WasmRegToIndex(valReg)); // [addr, value]
        emit->emitIns_MemargLane(INS_v128_store32_lane, EA_4BYTE, 8, 2);   // []
    }
}

//------------------------------------------------------------------------
// genWasmMemargOffset: Get the offset an indirection folds into its memarg.
//
// Arguments:
//    addr - the address node of the indirection
//
// Return Value:
//    The offset to encode in the memarg, or zero if the address carries no folded offset.
//
cnsval_ssize_t CodeGen::genWasmMemargOffset(GenTree* addr)
{
    if (addr->isContained() && addr->OperIs(GT_LEA))
    {
        return addr->AsAddrMode()->Offset();
    }

    if (addr->OperIs(GT_LCL_ADDR) && ((addr->gtLIRFlags & LIR::Flags::FoldedAddr) != LIR::Flags::None))
    {
        bool      FPBased;
        const int offset = m_compiler->lvaFrameAddress(addr->AsLclFld()->GetLclNum(), &FPBased) +
                           static_cast<int>(addr->AsLclFld()->GetLclOffs());
        noway_assert(offset >= 0); // WASM address modes are unsigned.
        assert(FPBased);
        return offset;
    }

    return 0;
}

//------------------------------------------------------------------------
// genCodeForIndir: Produce code for a GT_IND node.
//
// Arguments:
//    tree - the GT_IND node
//
void CodeGen::genCodeForIndir(GenTreeIndir* tree)
{
    assert(tree->OperIs(GT_IND));

    var_types type = tree->TypeGet();
    GenTree*  addr = tree->Addr();

    genConsumeAddress(addr);

    if ((tree->gtFlags & GTF_IND_NONFAULTING) == 0)
    {
        // "Base" is the address itself unless it is a contained address mode, which is never materialized.
        //
        genEmitNullCheck(GetMultiUseOperandReg(tree->Base()), tree->Base()->TypeGet());
    }

    // TODO-WASM: Memory barriers

    if (addr->isContained() && !addr->OperIs(GT_LEA))
    {
        // A contained address constant folds into the memarg offset, so emit just the address base here.
        //
        assert(addr->IsIconHandle() && !tree->TypeIs(TYP_SIMD12));
        assert(addr->AsIntConCommon()->ImmedValNeedsReloc(m_compiler));
        if (m_compiler->IsNativeAot())
        {
            GetEmitter()->emitIns_I(INS_i32_const, EA_PTRSIZE, 0);
        }
        else
        {
            GetEmitter()->emitImageBase();
        }
        GetEmitter()->emitIns_MemargAddress(ins_Load(type), emitActualTypeSize(type),
                                            (void*)addr->AsIntConCommon()->IntegralValue());
    }
    else if (type == TYP_SIMD12)
    {
        genLoadIndTypeSimd12(tree);
    }
    else
    {
        // A contained address mode's offset or a folded local's frame offset supplies the memarg.
        //
        GetEmitter()->emitIns_I(ins_Load(type), emitActualTypeSize(type), genWasmMemargOffset(addr));
    }

    WasmProduceReg(tree);
}

//------------------------------------------------------------------------
// genCodeForStoreInd: Produce code for a GT_STOREIND node.
//
// Arguments:
//    tree - the GT_STOREIND node
//
void CodeGen::genCodeForStoreInd(GenTreeStoreInd* tree)
{
    GenTree* data = tree->Data();
    GenTree* addr = tree->Addr();

    // A contained address mode's offset or a folded local's frame offset supplies the memarg.
    //
    assert(!addr->isContained() || addr->OperIs(GT_LEA));
    const cnsval_ssize_t offset = genWasmMemargOffset(addr);

    // We must consume the operands in the proper execution order,
    // so that liveness is updated appropriately.
    genConsumeAddress(addr);
    genConsumeRegs(data);

    if ((tree->gtFlags & GTF_IND_NONFAULTING) == 0)
    {
        // "Base" is the address itself unless it is a contained address mode, which is never materialized.
        //
        genEmitNullCheck(GetMultiUseOperandReg(tree->Base()), tree->Base()->TypeGet());
    }

    GCInfo::WriteBarrierForm writeBarrierForm = gcInfo.gcIsWriteBarrierCandidate(tree);
    if (writeBarrierForm != GCInfo::WBF_NoBarrier)
    {
        genGCWriteBarrier(writeBarrierForm);
    }
    else // A normal store, not a WriteBarrier store
    {
        var_types type = tree->TypeGet();

        // TODO-WASM: Memory barriers

        if (type == TYP_SIMD8)
        {
            // stack: [addr, value] -> store the low 8 bytes.
            GetEmitter()->emitIns_MemargLane(INS_v128_store64_lane, EA_8BYTE, offset, 0);
        }
        else if (type == TYP_SIMD12)
        {
            genStoreIndTypeSimd12(tree);
        }
        else
        {
            GetEmitter()->emitIns_I(ins_Store(type), emitActualTypeSize(type), offset);
        }
    }

    genUpdateLife(tree);
}

//------------------------------------------------------------------------
// genCall: Produce code for a GT_CALL node
//
// Arguments:
//    call - the GT_CALL node
//
void CodeGen::genCall(GenTreeCall* call)
{
    regNumber thisReg  = REG_NA;
    GenTree*  thisNode = nullptr;

    if (call->NeedsNullCheck())
    {
        CallArg* thisArg = call->gtArgs.GetThisArg();
        thisNode         = thisArg->GetNode();
        thisReg          = GetMultiUseOperandReg(thisNode);
    }

    for (CallArg& arg : call->gtArgs.EarlyArgs())
    {
        genConsumeRegs(arg.GetEarlyNode());
    }

    for (CallArg& arg : call->gtArgs.LateArgs())
    {
        genConsumeRegs(arg.GetLateNode());
    }

    if (call->NeedsNullCheck())
    {
        genEmitNullCheck(thisReg, thisNode->TypeGet());
    }

    genCallInstruction(call);
    WasmProduceReg(call);
}

//------------------------------------------------------------------------
// genCallInstruction - Generate instructions necessary to transfer control to the call.
//
// Arguments:
//    call - the GT_CALL node
//
void CodeGen::genCallInstruction(GenTreeCall* call)
{
    ensureCurrentFuncIsUnwindable();

    EmitCallParams params;
    params.isJump          = call->IsFastTailCall();
    params.hasAsyncRet     = call->IsAsync();
    params.returnValueCall = call;

#ifdef DEBUG
    // Pass the call signature information down into the emitter so the emitter can associate
    // native call sites with the signatures they were generated from.
    if (!call->IsHelperCall())
    {
        params.sigInfo = call->callSig;
    }
#endif // DEBUG

    GenTree* target = getCallTarget(call, &params.methHnd);

    ArrayStack<CorInfoWasmType> typeStack(m_compiler->getAllocator(CMK_Codegen));

    // Compute the wasm-level result type for the call. For fast tail calls, gtType
    // has been overwritten to TYP_VOID, but the wasm return_call_indirect signature
    // must match this function's return type, so use gtReturnType.
    const var_types callRetType = call->IsFastTailCall() ? (var_types)call->gtReturnType : genActualType(call);
    if (call->ShouldHaveRetBufArg() || (callRetType == TYP_VOID))
    {
        typeStack.Push(CORINFO_WASM_TYPE_VOID);
    }
    else if (callRetType == TYP_STRUCT)
    {
        CorInfoWasmType retWasmType = m_compiler->info.compCompHnd->getWasmLowering(call->gtRetClsHnd);
        // A struct wider than the wasm value it lowers to is returned through a hidden buffer,
        // so it must have been handled by the retbuf branch above.
        assert(retWasmType != CORINFO_WASM_TYPE_VOID);
        assert(m_compiler->info.compCompHnd->getClassSize(call->gtRetClsHnd) <=
               genTypeSize(WasmClassifier::ToJitType(retWasmType)));
        typeStack.Push(retWasmType);
    }
    else
    {
        // Normalize small ints (bool/byte/short/...).
        typeStack.Push((CorInfoWasmType)emitter::GetWasmValueTypeCode(ActualTypeToWasmValueType(callRetType)));
    }

    for (const CallArg& arg : call->gtArgs.Args())
    {
        for (const ABIPassingSegment& seg : arg.AbiInfo.Segments())
        {
            assert(seg.IsPassedInRegister());
            WasmValueType wvt = WasmRegToType(seg.GetRegister());
            assert(wvt < WasmValueType::Count);
            typeStack.Push((CorInfoWasmType)emitter::GetWasmValueTypeCode(wvt));
        }
    }

    // Report managed call signatures to the R2R compiler for thunk generation.
    if (!call->IsHelperCall() && !call->IsUnmanaged())
    {
        CORINFO_SIG_INFO  sigInfoLocal;
        CORINFO_SIG_INFO* sigInfoCall = call->callSig;

        if (sigInfoCall == nullptr)
        {
            if ((params.methHnd != NO_METHOD_HANDLE) &&
                (Compiler::eeGetHelperNum(params.methHnd) == CORINFO_HELP_UNDEF))
            {
                m_compiler->eeGetMethodSig(params.methHnd, &sigInfoLocal);
                sigInfoCall = &sigInfoLocal;
                if (callRetType == TYP_REF && sigInfoCall->retType == CORINFO_TYPE_VOID &&
                    sigInfoCall->callConv == CORINFO_CALLCONV_HASTHIS)
                {
                    // String ctors are special. The JIT recognizes them, and rewrites the call to call the function as
                    // a static function which returns the string instead of calling them with the normal
                    // allocation/initialization pattern. The signature of the static function is different from the
                    // instance method, so we need to adjust the signature here to match what the WASM runtime expects.
                    const unsigned       methodFlags = m_compiler->info.compCompHnd->getMethodAttribs(params.methHnd);
                    CORINFO_CLASS_HANDLE stringClass = m_compiler->info.compCompHnd->getBuiltinClass(CLASSID_STRING);

                    if ((methodFlags & CORINFO_FLG_CONSTRUCTOR) != 0 && (stringClass != NO_CLASS_HANDLE) &&
                        (m_compiler->info.compCompHnd->getMethodClass(params.methHnd) == stringClass))
                    {
                        // Adjust sigInfoCall for string ctor case
                        sigInfoCall->retType  = CORINFO_TYPE_CLASS;
                        sigInfoCall->callConv = CORINFO_CALLCONV_DEFAULT;
                    }
                }
            }
        }

        if (sigInfoCall != nullptr)
        {
            m_compiler->info.compCompHnd->recordWasmManagedCallSig(sigInfoCall);
        }
    }

    params.wasmSignature = m_compiler->info.compCompHnd->getWasmTypeSymbol(typeStack.Data(), typeStack.Height());

    // R2R keeps its shadow SP in a local and leaves the __stack_pointer global stale; the PInvoke
    // prolog (JIT_PInvokeBegin) normally publishes the current SP to __stack_pointer before native
    // code runs, but that prolog/epilog is skipped for SuppressGCTransition calls (see Lowering).
    // Without a publish, the native SuppressGCTransition callee allocates its shadow frame from the
    // stale global (our caller's SP, above our frame) and overlaps/clobbers our address-taken locals.
    // Publish our shadow SP here so the callee allocates below our frame. This is a net-zero operation
    // on the Wasm operand stack, so it is safe to emit with the call arguments already pushed.
    if (call->IsUnmanaged() && call->IsSuppressGCTransition())
    {
        GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());
        GetEmitter()->emitIns_I(INS_global_set, EA_HANDLE_CNS_RELOC,
                                (cnsval_ssize_t)(size_t)m_compiler->eeGetWasmWellKnownGlobals()->stackPointer);
    }

    // A non-null target expression always indicates an indirect call on Wasm,
    // as currently the only possible result of the target expression would be a
    // table index which must be used via call_indirect
    if (target != nullptr)
    {
        // Codegen should have already evaluated our target node (last) and pushed it onto the stack,
        //  ready for call_indirect. Consume it.
        genConsumeReg(target);

        params.callType = EC_INDIR_R;
        genEmitCallWithCurrentGC(params);
    }
    else
    {
        // Generate a direct call to a non-virtual user defined or helper method
        assert(call->IsHelperCall() || (call->gtCallType == CT_USER_FUNC));

        if (call->IsHelperCall())
        {
            assert(!call->IsFastTailCall());

            if (call->gtDirectCallAddress != nullptr)
            {
                params.addr = call->gtDirectCallAddress;
            }
            else
            {
                CorInfoHelpFunc helperNum = m_compiler->eeGetHelperNum(params.methHnd);
                noway_assert(helperNum != CORINFO_HELP_UNDEF);
                CORINFO_CONST_LOOKUP helperLookup = m_compiler->compGetHelperFtn(helperNum);
                assert(helperLookup.accessType == IAT_VALUE);
                params.addr = helperLookup.addr;
            }
        }
        else
        {
            // Direct call to a non-virtual user function.
            params.addr = call->gtDirectCallAddress;
        }

        params.callType = EC_FUNC_TOKEN;
        genEmitCallWithCurrentGC(params);
    }
}

//------------------------------------------------------------------------
// genEmitHelperCall: emit a call to a runtime helper
//
// Arguments:
//   hgelper -- helper call index (CorinfoHelpFunc enum value)
//   argSize -- ignored
//   retSize -- ignored
//   callTargetReg -- ignored
//
// Notes:
//   Wasm helper calls typically use the managed calling convention.
//   SP arg must be first if obligatory, on the stack below any arguments.
//   To see whether a given helper uses the managed calling convention, check the _SIG entry for it below.
//
void CodeGen::genEmitHelperCall(unsigned helper, int argSize, emitAttr retSize, regNumber callTargetReg /*= REG_NA */)
{
    ensureCurrentFuncIsUnwindable();

    EmitCallParams params;

    CORINFO_CONST_LOOKUP helperFunction = m_compiler->compGetHelperFtn((CorInfoHelpFunc)helper);
    params.ireg                         = callTargetReg;

    if (helperFunction.accessType == IAT_VALUE)
    {
        params.callType = EC_FUNC_TOKEN;
        params.addr     = helperFunction.addr;
    }
    else
    {
        assert(helperFunction.accessType == IAT_PVALUE);
        params.addr     = nullptr;
        params.callType = EC_INDIR_R;
    }

    params.methHnd = m_compiler->eeFindHelper(helper);
    params.argSize = argSize;
    params.retSize = retSize;

    CorInfoWasmType* types           = nullptr;
    size_t           typeCount       = 0;
    bool             helperIsManaged = false;
    bool             helperUsesPep   = false;

    const bool MANAGED = true, UNMANAGED = false;
#ifdef TARGET_64BIT
    const CorInfoWasmType CORINFO_WASM_TYPE_I = CORINFO_WASM_TYPE_I64;
#else
    const CorInfoWasmType CORINFO_WASM_TYPE_I = CORINFO_WASM_TYPE_I32;
#endif // TARGET_64BIT

#define HELPER_SIG(helper_id, is_managed, ...)                                                                         \
    case helper_id:                                                                                                    \
    {                                                                                                                  \
        static CorInfoWasmType helper_id##_types[] = {__VA_ARGS__};                                                    \
        types                                      = helper_id##_types;                                                \
        typeCount                                  = ArrLen(helper_id##_types);                                        \
        helperIsManaged                            = is_managed;                                                       \
        helperUsesPep = helperIsManaged && m_compiler->opts.jitFlags->IsSet(JitFlags::JIT_FLAG_PORTABLE_ENTRY_POINTS); \
        if (helperIsManaged /* `types` includes PEP */ && !helperUsesPep)                                              \
            typeCount--;                                                                                               \
        break;                                                                                                         \
    }

    switch (helper)
    {
        // Managed throw helpers with no args
        HELPER_SIG(CORINFO_HELP_RNGCHKFAIL, MANAGED, CORINFO_WASM_TYPE_VOID /* retval */, CORINFO_WASM_TYPE_I /* sp */,
                   CORINFO_WASM_TYPE_I /* pep */);
        HELPER_SIG(CORINFO_HELP_OVERFLOW, MANAGED, CORINFO_WASM_TYPE_VOID /* retval */, CORINFO_WASM_TYPE_I /* sp */,
                   CORINFO_WASM_TYPE_I /* pep */);
        HELPER_SIG(CORINFO_HELP_THROWDIVZERO, MANAGED, CORINFO_WASM_TYPE_VOID /* retval */,
                   CORINFO_WASM_TYPE_I /* sp */, CORINFO_WASM_TYPE_I /* pep */);
        HELPER_SIG(CORINFO_HELP_THROWNULLREF, MANAGED, CORINFO_WASM_TYPE_VOID /* retval */,
                   CORINFO_WASM_TYPE_I /* sp */, CORINFO_WASM_TYPE_I /* pep */);
        HELPER_SIG(CORINFO_HELP_THROW_ARGUMENTEXCEPTION, MANAGED, CORINFO_WASM_TYPE_VOID /* retval */,
                   CORINFO_WASM_TYPE_I /* sp */, CORINFO_WASM_TYPE_I /* pep */);
        HELPER_SIG(CORINFO_HELP_THROW_ARGUMENTOUTOFRANGEEXCEPTION, MANAGED, CORINFO_WASM_TYPE_VOID /* retval */,
                   CORINFO_WASM_TYPE_I /* sp */, CORINFO_WASM_TYPE_I /* pep */);
        HELPER_SIG(CORINFO_HELP_THROW_NOT_IMPLEMENTED, MANAGED, CORINFO_WASM_TYPE_VOID /* retval */,
                   CORINFO_WASM_TYPE_I /* sp */, CORINFO_WASM_TYPE_I /* pep */);
        HELPER_SIG(CORINFO_HELP_THROW_PLATFORM_NOT_SUPPORTED, MANAGED, CORINFO_WASM_TYPE_VOID /* retval */,
                   CORINFO_WASM_TYPE_I /* sp */, CORINFO_WASM_TYPE_I /* pep */);
        HELPER_SIG(CORINFO_HELP_THROW_TYPE_NOT_SUPPORTED, MANAGED, CORINFO_WASM_TYPE_VOID /* retval */,
                   CORINFO_WASM_TYPE_I /* sp */, CORINFO_WASM_TYPE_I /* pep */);
        // RhpAssignRef
        HELPER_SIG(CORINFO_HELP_ASSIGN_REF, UNMANAGED, CORINFO_WASM_TYPE_VOID /* retval */, CORINFO_WASM_TYPE_I,
                   CORINFO_WASM_TYPE_I);
        // RhpCheckedAssignRef
        HELPER_SIG(CORINFO_HELP_CHECKED_ASSIGN_REF, UNMANAGED, CORINFO_WASM_TYPE_VOID /* retval */, CORINFO_WASM_TYPE_I,
                   CORINFO_WASM_TYPE_I);
        // RhBulkMoveWithWriteBarrier
        HELPER_SIG(CORINFO_HELP_BULK_WRITEBARRIER, UNMANAGED, CORINFO_WASM_TYPE_VOID /* retval */, CORINFO_WASM_TYPE_I,
                   CORINFO_WASM_TYPE_I, CORINFO_WASM_TYPE_I);
        // RhBulkMoveWithWriteBarrier
        HELPER_SIG(CORINFO_HELP_BULK_WRITEBARRIER_SMALL, UNMANAGED, CORINFO_WASM_TYPE_VOID /* retval */,
                   CORINFO_WASM_TYPE_I, CORINFO_WASM_TYPE_I, CORINFO_WASM_TYPE_I);
        default:
            JITDUMP("Helper '%s' has no hard-coded signature\n", m_compiler->eeGetMethodFullName(params.methHnd));
            unreached();
    }

#undef HELPER_SIG

    params.wasmSignature = m_compiler->info.compCompHnd->getWasmTypeSymbol(types, typeCount);

    if (helperUsesPep)
    {
        if (helperFunction.accessType == IAT_VALUE)
        {
            // Direct same-image managed helpers do not need a portable entrypoint.
            GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, 0);
        }
        else
        {
            // Push PEP onto the stack because we are calling a managed helper that expects it as the last parameter.
            // The helper function address is the address of an indirection cell, so load the PEP address from the cell.
            assert(helperFunction.accessType == IAT_PVALUE);
            GetEmitter()->emitAddressConstant(helperFunction.addr);
            GetEmitter()->emitIns_I(INS_I_load, EA_PTRSIZE, 0);
        }
    }

    if (params.callType == EC_INDIR_R)
    {
        // Push the call target onto the wasm evaluation stack by dereferencing the indirection cell
        // and then the PEP pointed to by the indirection cell.
        assert(helperFunction.accessType == IAT_PVALUE);
        GetEmitter()->emitAddressConstant(helperFunction.addr);
        GetEmitter()->emitIns_I(INS_I_load, EA_PTRSIZE, 0);
        GetEmitter()->emitIns_I(INS_I_load, EA_PTRSIZE, 0);
    }

    genEmitCallWithCurrentGC(params);
}

//------------------------------------------------------------------------
// genCodeForCompare: Produce code for a GT_EQ/GT_NE/GT_LT/GT_LE/GT_GE/GT_GT node.
//
// Arguments:
//    tree - the node
//
void CodeGen::genCodeForCompare(GenTreeOp* tree)
{
    assert(tree->OperIsCmpCompare());

    GenTree* const  op1     = tree->gtGetOp1();
    var_types const op1Type = op1->TypeGet();

    if (varTypeIsFloating(op1Type))
    {
        genCompareFloat(tree);
    }
    else
    {
        genCompareInt(tree);
    }
}

//------------------------------------------------------------------------
// genCompareInt: Generate code for comparing ints or longs
//
// Arguments:
//    treeNode - the compare tree
//
void CodeGen::genCompareInt(GenTreeOp* treeNode)
{
    assert(treeNode->OperIsCmpCompare());

    GenTree* const op1   = treeNode->gtGetOp1();
    GenTree* const op2   = treeNode->gtGetOp2();
    GenTree*       value = nullptr;

    if (treeNode->OperIs(GT_EQ, GT_NE))
    {
        if (op1->isContained() && op1->IsIntegralConst(0))
        {
            value = op2;
        }
        else if (op2->isContained() && op2->IsIntegralConst(0))
        {
            value = op1;
        }
    }

    genConsumeOperands(treeNode);

    if (value != nullptr)
    {
        const bool canUseValueDirectly = treeNode->OperIs(GT_NE) && ((treeNode->gtFlags & GTF_RELOP_JMP_USED) != 0) &&
                                         (genActualType(value->TypeGet()) == TYP_INT);

        if (!canUseValueDirectly)
        {
            GetEmitter()->emitIns(genActualType(value->TypeGet()) == TYP_LONG ? INS_i64_eqz : INS_i32_eqz);
            if (treeNode->OperIs(GT_NE))
            {
                GetEmitter()->emitIns(INS_i32_eqz);
            }
        }

        WasmProduceReg(treeNode);
        return;
    }

    instruction ins;
    switch (PackOperAndType(treeNode->OperGet(), genActualType(op1->TypeGet())))
    {
        case PackOperAndType(GT_EQ, TYP_INT):
            ins = INS_i32_eq;
            break;
        case PackOperAndType(GT_EQ, TYP_LONG):
            ins = INS_i64_eq;
            break;
        case PackOperAndType(GT_NE, TYP_INT):
            ins = INS_i32_ne;
            break;
        case PackOperAndType(GT_NE, TYP_LONG):
            ins = INS_i64_ne;
            break;
        case PackOperAndType(GT_LT, TYP_INT):
            ins = treeNode->IsUnsigned() ? INS_i32_lt_u : INS_i32_lt_s;
            break;
        case PackOperAndType(GT_LT, TYP_LONG):
            ins = treeNode->IsUnsigned() ? INS_i64_lt_u : INS_i64_lt_s;
            break;
        case PackOperAndType(GT_LE, TYP_INT):
            ins = treeNode->IsUnsigned() ? INS_i32_le_u : INS_i32_le_s;
            break;
        case PackOperAndType(GT_LE, TYP_LONG):
            ins = treeNode->IsUnsigned() ? INS_i64_le_u : INS_i64_le_s;
            break;
        case PackOperAndType(GT_GE, TYP_INT):
            ins = treeNode->IsUnsigned() ? INS_i32_ge_u : INS_i32_ge_s;
            break;
        case PackOperAndType(GT_GE, TYP_LONG):
            ins = treeNode->IsUnsigned() ? INS_i64_ge_u : INS_i64_ge_s;
            break;
        case PackOperAndType(GT_GT, TYP_INT):
            ins = treeNode->IsUnsigned() ? INS_i32_gt_u : INS_i32_gt_s;
            break;
        case PackOperAndType(GT_GT, TYP_LONG):
            ins = treeNode->IsUnsigned() ? INS_i64_gt_u : INS_i64_gt_s;
            break;
        default:
            unreached();
    }

    GetEmitter()->emitIns(ins);
    WasmProduceReg(treeNode);
}

//------------------------------------------------------------------------
// genCompareFloat: Generate code for comparing floats
//
// Arguments:
//    treeNode - the compare tree
//
void CodeGen::genCompareFloat(GenTreeOp* treeNode)
{
    assert(treeNode->OperIsCmpCompare());

    genTreeOps op          = treeNode->OperGet();
    bool       invertSense = false;

    if ((treeNode->gtFlags & GTF_RELOP_NAN_UN) != 0)
    {
        // We don't expect to see GT_EQ unordered,
        // since CIL doesn't have this mode.
        //
        assert(op != GT_EQ);

        // Wasm float comparisons other than "fne" return false for NaNs.
        // Our unordered float compares need to return true for NaNs.
        //
        // So we can re-express say GT_GE (UN) as !GT_LT
        //
        if (op != GT_NE)
        {
            op          = GenTree::ReverseRelop(op);
            invertSense = true;
        }
    }
    else
    {
        // We don't expect to see GT_NE ordered,
        // since CIL doesn't have this mode.
        //
        assert(op != GT_NE);
    }

    genConsumeOperands(treeNode);

    instruction ins;
    switch (PackOperAndType(op, treeNode->gtOp1->TypeGet()))
    {
        case PackOperAndType(GT_EQ, TYP_FLOAT):
            ins = INS_f32_eq;
            break;
        case PackOperAndType(GT_EQ, TYP_DOUBLE):
            ins = INS_f64_eq;
            break;
        case PackOperAndType(GT_NE, TYP_FLOAT):
            ins = INS_f32_ne;
            break;
        case PackOperAndType(GT_NE, TYP_DOUBLE):
            ins = INS_f64_ne;
            break;
        case PackOperAndType(GT_LT, TYP_FLOAT):
            ins = INS_f32_lt;
            break;
        case PackOperAndType(GT_LT, TYP_DOUBLE):
            ins = INS_f64_lt;
            break;
        case PackOperAndType(GT_LE, TYP_FLOAT):
            ins = INS_f32_le;
            break;
        case PackOperAndType(GT_LE, TYP_DOUBLE):
            ins = INS_f64_le;
            break;
        case PackOperAndType(GT_GE, TYP_FLOAT):
            ins = INS_f32_ge;
            break;
        case PackOperAndType(GT_GE, TYP_DOUBLE):
            ins = INS_f64_ge;
            break;
        case PackOperAndType(GT_GT, TYP_FLOAT):
            ins = INS_f32_gt;
            break;
        case PackOperAndType(GT_GT, TYP_DOUBLE):
            ins = INS_f64_gt;
            break;
        default:
            unreached();
    }

    GetEmitter()->emitIns(ins);

    if (invertSense)
    {
        GetEmitter()->emitIns(INS_i32_eqz);
    }

    WasmProduceReg(treeNode);
}

//------------------------------------------------------------------------
// genLclHeap: Generate code for LCLHEAP
//
// Arguments:
//    tree -- LCLHEAP tree
//
// Notes:
//   Codegen varies depending on:
//   * whether the size operand is a constant or not
//   * whether the allocated memory needs to be zeroed or not (info.compInitMem)
//
//   If the sp is changed, the value at sp[0] must be set to zero and
//   the frame pointer stored at sp[TARGET_POINTER_SIZE] so that the runtime unwinder
//   can locate the base of the fixed area in the shadow stack.
//
void CodeGen::genLclHeap(GenTree* tree)
{
    assert(tree->OperIs(GT_LCLHEAP));
    assert(m_compiler->compLocallocUsed);
    assert(isFramePointerUsed());

    bool const     needsZeroing = m_compiler->info.compInitMem;
    GenTree* const size         = tree->AsOp()->gtOp1;

    // We reserve this amount of space below any allocation for
    // establishing unwind invariants.
    //
    size_t const reservedSpace = STACK_ALIGN;

    // Constant LCLHEAP size operands are contained by lower.
    //
    if (size->isContainedIntOrIImmed())
    {
        size_t amount = size->AsIntCon()->IconValue();

        // Handle zero
        //
        if (amount == 0)
        {
            GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, 0);
        }
        else
        {
            // Add in the reserved space and round up.
            //
            amount = AlignUp(amount + reservedSpace, STACK_ALIGN);

            // Decrease the stack pointer by amount
            //
            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());
            GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, amount);
            GetEmitter()->emitIns(INS_I_sub);
            GetEmitter()->emitIns_I(INS_local_set, EA_PTRSIZE, GetStackPointerRegIndex());

            // Zero the newly allocated space if needed
            //
            if (needsZeroing)
            {
                GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());
                GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, 0);
                GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, amount);

                // TODO-WASM-CQ: possibly do small fills directly
                //
                GetEmitter()->emitIns_I(INS_memory_fill, EA_4BYTE, LINEAR_MEMORY_INDEX);
            }

            // SP now points at the reserved space just below the allocation.
            // Save the frame pointer at sp[TARGET_POINTER_SIZE].
            //
            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());
            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetFramePointerRegIndex());
            GetEmitter()->emitIns_I(ins_Store(TYP_I_IMPL), EA_PTRSIZE, TARGET_POINTER_SIZE);

            // Set sp[0] zero.
            //
            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());
            GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, 0);
            GetEmitter()->emitIns_I(ins_Store(TYP_I_IMPL), EA_PTRSIZE, 0);

            // Leave the base address of the allocated region on the stack.
            //
            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());
            GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, reservedSpace);
            GetEmitter()->emitIns(INS_I_add);
        }
    }
    else
    {
        genConsumeReg(size);

        // Extend size to pointer size, if necessary
        if (genTypeSize(genActualType(size->TypeGet())) < TARGET_POINTER_SIZE)
        {
            assert(TARGET_POINTER_SIZE == 8);
            GetEmitter()->emitIns(INS_i64_extend_u_i32);
        }

        // Fetch the internal register we reserved during RA
        InternalRegs* regs = internalRegisters.GetAll(tree);
        assert(regs->Count() == 1);
        regNumber sizeReg = regs->Extract();
        assert(WasmRegToType(sizeReg) == TypeToWasmValueType(TYP_I_IMPL));

        // Save the size
        GetEmitter()->emitIns_I(INS_local_tee, EA_PTRSIZE, WasmRegToIndex(sizeReg));

        // Check for zero-sized requests
        GetEmitter()->emitIns(INS_I_eqz);
        genEmitIf(WasmValueType::I);
        {
            // If size is zero, leave a zero on the stack
            GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, 0);
        }
        // Else ... nonzero size case.
        GetEmitter()->emitIns(INS_else);
        {
            // Prepare to subtract from SP
            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());

            // Add reserved space and round up request size to a multiple of STACK_ALIGN
            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, WasmRegToIndex(sizeReg));
            GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, reservedSpace + STACK_ALIGN - 1);
            GetEmitter()->emitIns(INS_I_add);
            GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, ~cnsval_ssize_t(STACK_ALIGN - 1));
            GetEmitter()->emitIns(INS_I_and);

            // Save the aligned size for the zeroing call below if needed.
            if (needsZeroing)
            {
                GetEmitter()->emitIns_I(INS_local_tee, EA_PTRSIZE, WasmRegToIndex(sizeReg));
            }

            // Subtract rounded-up size from SP value, and save back to SP
            GetEmitter()->emitIns(INS_I_sub);
            GetEmitter()->emitIns_I(INS_local_set, EA_PTRSIZE, GetStackPointerRegIndex());

            if (needsZeroing)
            {
                GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());
                GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, 0);
                GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, WasmRegToIndex(sizeReg));
                // TODO-WASM-CQ: possibly do small fills directly
                GetEmitter()->emitIns_I(INS_memory_fill, EA_4BYTE, LINEAR_MEMORY_INDEX);
            }

            // SP now points at the reserved space just below the allocation.
            // Save the frame pointer at sp[TARGET_POINTER_SIZE].
            //
            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());
            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetFramePointerRegIndex());
            GetEmitter()->emitIns_I(ins_Store(TYP_I_IMPL), EA_PTRSIZE, TARGET_POINTER_SIZE);

            // Set sp[0] zero.
            //
            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());
            GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, 0);
            GetEmitter()->emitIns_I(ins_Store(TYP_I_IMPL), EA_PTRSIZE, 0);

            // Return value
            GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());
            GetEmitter()->emitIns_I(INS_I_const, EA_PTRSIZE, reservedSpace);
            GetEmitter()->emitIns(INS_I_add);
        }

        // end if
        genEmitEndIf();
    }

    WasmProduceReg(tree);
}

//------------------------------------------------------------------------
// genCodeForStoreBlk: Produce code for a GT_STORE_BLK node.
//
// Arguments:
//    blkOp - the node
//
void CodeGen::genCodeForStoreBlk(GenTreeBlk* blkOp)
{
    assert(blkOp->OperIs(GT_STORE_BLK));

    bool isCopyBlk  = blkOp->OperIsCopyBlkOp();
    bool isNativeOp = blkOp->gtBlkOpKind == GenTreeBlk::BlkOpKindNativeOpcode;
    // If the destination is on the stack we don't need a write barrier.
    bool dstOnStack = blkOp->IsAddressNotOnHeap(m_compiler);

    if (blkOp->gtBlkOpKind == GenTreeBlk::BlkOpKindLoop)
    {
        assert(!isCopyBlk);
        genCodeForInitBlkLoop(blkOp);
        genUpdateLife(blkOp);
        return;
    }

    // If our destination is on the stack we should be handling it with a native memory.copy/fill,
    // lowering should only select cpobj for cases where a write barrier is potentially necessary.
    assert(!dstOnStack || isNativeOp);

#ifdef DEBUG
    // If we're not using the native memory.copy/fill opcodes and are doing cpobj, we should only
    // see types that have GC pointers in them.
    assert(isNativeOp || blkOp->GetLayout()->HasGCPtr());
#endif // DEBUG

    bool      nullCheckDest = (blkOp->gtFlags & GTF_IND_NONFAULTING) == 0;
    bool      nullCheckSrc  = false;
    GenTree*  dest          = blkOp->Addr();
    var_types destType      = TYP_UNKNOWN;
    GenTree*  src           = blkOp->Data();
    var_types srcType       = TYP_UNKNOWN;
    regNumber destReg       = REG_NA;
    regNumber srcReg        = REG_NA;
    unsigned  destOffset    = 0;
    unsigned  srcOffset     = 0;

    // Unwrap a contained GT_INIT_VAL so the wrapped fill value (not the wrapper) is pushed onto the WASM value stack.
    GenTree* srcForConsume = src->OperIs(GT_INIT_VAL) ? src->gtGetOp1() : src;
    assert(!src->OperIs(GT_INIT_VAL) || src->isContained());

    genConsumeRegs(dest);
    genConsumeRegs(srcForConsume);

    // If the source is a byref or pointer it will be a GT_IND that we need to unwrap to extract the
    //  actual address we're loading from. Note that this does not apply to the destination.
    if (src->OperIs(GT_IND))
    {
        nullCheckSrc = (src->gtFlags & GTF_IND_NONFAULTING) == 0;
        src          = src->gtGetOp1();
        // We need to match lowering and only fetch a register for src when we're expected to.
        if (!isNativeOp || nullCheckSrc)
        {
            srcReg  = GetMultiUseOperandReg(src);
            srcType = src->TypeGet();
        }
        assert(!src->isContained());
    }
    else if (src->OperIs(GT_CNS_INT, GT_INIT_VAL))
    {
        if (src->OperIs(GT_INIT_VAL))
        {
            src = src->gtGetOp1();
        }
        assert(!src->isContained());
        assert(!isCopyBlk);
        assert(isNativeOp);
    }
    else
    {
        assert(src->OperIs(GT_LCL_VAR, GT_LCL_FLD));
        GenTreeLclVarCommon* lclVar = src->AsLclVarCommon();
        bool                 fpBased;
        srcReg = GetFramePointerReg(m_compiler->funCurrentFuncIdx());
        // A frame-based address is a byref
        srcType   = TYP_BYREF;
        srcOffset = m_compiler->lvaFrameAddress(lclVar->GetLclNum(), &fpBased) + lclVar->GetLclOffs();
        assert(fpBased);
    }

    if (dest->OperIs(GT_LCL_ADDR))
    {
        GenTreeLclVarCommon* lclVar = dest->AsLclVarCommon();
        bool                 fpBased;
        destReg    = GetFramePointerReg(m_compiler->funCurrentFuncIdx());
        destType   = TYP_BYREF;
        destOffset = m_compiler->lvaFrameAddress(lclVar->GetLclNum(), &fpBased) + lclVar->GetLclOffs();
        assert(fpBased);
    }
    else if (isNativeOp && !nullCheckDest)
    {
        // We need to match lowering in this specific case by not fetching a register for dest.
    }
    else if (isCopyBlk || nullCheckDest)
    {
        destReg  = GetMultiUseOperandReg(dest);
        destType = dest->TypeGet();
    }
    else
    {
        // This should be a native memory.fill for an initblk, where
        // the destination is not being null checked so we didn't flag
        // dest as multiply-used and can't allocate a reg for it.
        assert(isNativeOp);
    }

    if (nullCheckDest)
    {
        assert(destType != TYP_UNKNOWN);
        genEmitNullCheck(destReg, destType);
    }
    if (nullCheckSrc)
    {
        assert(srcType != TYP_UNKNOWN);
        genEmitNullCheck(srcReg, srcType);
    }

    emitter* emit = GetEmitter();

    if (isNativeOp)
    {
        // The destination should already be on the stack.
        // The src may not be on the evaluation stack if it was contained, in which case we need to manufacture it
        if (src->isContained())
        {
            assert(isCopyBlk);
            assert(srcReg != REG_NA);
            genEmitLocalGet(srcReg, WasmValueType::I);
            if (srcOffset != 0)
            {
                emit->emitIns_I(INS_I_const, EA_PTRSIZE, srcOffset);
                emit->emitIns(INS_I_add);
            }
        }
        GetEmitter()->emitIns_I(INS_i32_const, EA_4BYTE, blkOp->Size());
        GetEmitter()->emitIns_I(isCopyBlk ? INS_memory_copy : INS_memory_fill, EA_4BYTE, LINEAR_MEMORY_INDEX);
        genUpdateLife(blkOp);
        return;
    }

    // TODO-WASM: Remove the need to do this somehow
    // The dst and src may be on the evaluation stack, but we can't reliably use them, so drop them.
    assert(!dest->isContained());
    emit->emitIns(INS_drop);
    if (!src->isContained())
    {
        emit->emitIns(INS_drop);
    }

    if (blkOp->IsVolatile())
    {
        // TODO-WASM: Memory barrier
    }

    ClassLayout* layout = blkOp->GetLayout();
    unsigned     slots  = layout->GetSlotCount();

    unsigned gcPtrCount = blkOp->GetLayout()->GetGCPtrCount();

    unsigned i = 0;
    while (i < slots)
    {
        // Copy the pointer-sized non-gc-pointer slots one at a time using regular I-sized load/store pairs,
        //  and gc-pointer slots using a write barrier.
        if (!layout->IsGCPtr(i))
        {
            // Do a pointer-sized load+store pair at the appropriate offset relative to dest and source
            genEmitLocalGet(destReg, WasmValueType::I);
            genEmitLocalGet(srcReg, WasmValueType::I);
            emit->emitIns_I(INS_I_load, EA_PTRSIZE, srcOffset);
            emit->emitIns_I(INS_I_store, EA_PTRSIZE, destOffset);
        }
        else
        {
            // Compute the actual dest/src of the slot being copied to pass to the helper.
            genEmitLocalGet(destReg, WasmValueType::I);
            emit->emitIns_I(INS_I_const, EA_PTRSIZE, destOffset);
            emit->emitIns(INS_I_add);
            genEmitLocalGet(srcReg, WasmValueType::I);
            emit->emitIns_I(INS_I_load, EA_PTRSIZE, srcOffset);
            // NOTE: This helper's signature omits SP/PEP so all we need on the stack is dst and ref.
            genEmitHelperCall(CORINFO_HELP_CHECKED_ASSIGN_REF, 0, EA_PTRSIZE);
            gcPtrCount--;
        }
        ++i;
        destOffset += TARGET_POINTER_SIZE;
        srcOffset += TARGET_POINTER_SIZE;
    }

    assert(gcPtrCount == 0);

    if (blkOp->IsVolatile())
    {
        // TODO-WASM: Memory barrier
    }

    genUpdateLife(blkOp);
}

//------------------------------------------------------------------------
// genCodeForInitBlkLoop - Generate code for an InitBlk using an inlined for-loop.
//    It's needed for cases when size is too big to unroll and we're not allowed
//    to use memset call due to atomicity requirements.
//
// Arguments:
//    blkOp - the GT_STORE_BLK node
//
void CodeGen::genCodeForInitBlkLoop(GenTreeBlk* blkOp)
{
    // TODO-WASM: In multi-threaded wasm we will need to generate a for loop that atomically zeroes one GC ref
    //  at a time. Right now we're single-threaded, so we can just use memory.fill.
    assert(!WASM_THREAD_SUPPORT);

    // FIXME-WASM: We're missing a null check here.

    genConsumeOperands(blkOp);
    // Emit the value constant expected by the memory.fill opcode (zero)
    GetEmitter()->emitIns_I(INS_i32_const, EA_4BYTE, 0);
    // Emit the size constant expected by the memory.copy and memory.fill opcodes
    GetEmitter()->emitIns_I(INS_i32_const, EA_4BYTE, blkOp->Size());
    GetEmitter()->emitIns_I(INS_memory_fill, EA_8BYTE, LINEAR_MEMORY_INDEX);
}

//------------------------------------------------------------------------
// genCallFinally: Generate a call to a finally.
//
// Arguments:
//   block - callfinally block
//
void CodeGen::genCallFinally(BasicBlock* block)
{
    assert(block->KindIs(BBJ_CALLFINALLY));
    BasicBlock* const finallyTarget = block->GetTarget();
    EHblkDsc* const   ehDsc         = m_compiler->ehGetBlockHndDsc(finallyTarget);
    assert(ehDsc->ebdHandlerType == EH_HANDLER_FINALLY);
    assert(ehDsc->ebdHndBeg == finallyTarget);
    unsigned const funcletIndex = ehDsc->ebdFuncIndex;

    assert((funcletIndex >= 1) && (funcletIndex < m_compiler->compFuncCount()));

    ensureCurrentFuncIsUnwindable();

    EmitCallParams params;
    params.callType = EmitCallType::EC_INDIR_R;

    // A finally takes SP and FP as arguments, and returns nothing.
    //
    CorInfoWasmType             ptrType = (TARGET_POINTER_SIZE == 4) ? CORINFO_WASM_TYPE_I32 : CORINFO_WASM_TYPE_I64;
    ArrayStack<CorInfoWasmType> typeStack(m_compiler->getAllocator(CMK_Codegen));
    typeStack.Push(CORINFO_WASM_TYPE_VOID);
    typeStack.Push(ptrType);
    typeStack.Push(ptrType);

    params.wasmSignature = m_compiler->info.compCompHnd->getWasmTypeSymbol(typeStack.Data(), typeStack.Height());

    GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetStackPointerRegIndex());
    GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetFramePointerRegIndex());
    GetEmitter()->emitFuncletAddressConstant(funcletIndex);

    genEmitCallWithCurrentGC(params);

    if (block->HasFlag(BBF_RETLESS_CALL))
    {
        GetEmitter()->emitIns(INS_unreachable);

        // A retless BBJ_CALLFINALLY can be the last block of a wasm function/funclet;
        // every wasm function body must end with `end`.
        //
        if (block->IsLast() || m_compiler->bbIsFuncletBeg(block->Next()))
        {
            GetEmitter()->emitIns(INS_end);
        }

        return;
    }

    // Branch to the continuation block unless we can fall into it.
    assert(block->isBBCallFinallyPair());
    BasicBlock* const callFinallyRet = block->Next();
    assert(callFinallyRet->KindIs(BBJ_CALLFINALLYRET));
    BasicBlock* const continuation = callFinallyRet->GetTarget();

    if (!callFinallyRet->CanRemoveJumpToTarget(continuation, m_compiler))
    {
        inst_JMP(EJ_jmp, continuation);
    }
}

//------------------------------------------------------------------------
// genEHCatchRet - Generate code for an EH catch return.
//
// Arguments:
//    block -- the block with BBJ_EHCATCHRET that we need to generate code for
//
void CodeGen::genEHCatchRet(BasicBlock* block)
{
    // TODO-WASM: return the actual ResumeIP here?
    // The runtime expects a return value from a catch funclet,
    // but nothing will depend on it.
    //
    GetEmitter()->emitIns_I(INS_i32_const, EA_4BYTE, 0);
}

void CodeGen::genStructReturn(GenTree* treeNode)
{
    assert(treeNode->OperIs(GT_RETURN));

    GenTree* op1       = treeNode->AsOp()->GetReturnValue();
    GenTree* actualOp1 = op1->gtSkipReloadOrCopy();

    const ReturnTypeDesc& retTypeDesc = m_compiler->compRetTypeDesc;
    const unsigned        regCount    = retTypeDesc.GetReturnRegCount();

    assert(regCount <= MAX_RET_REG_COUNT);

    if (actualOp1->OperIsFieldList())
    {
        // Go through and consume the fields in the field list so liveness is correct.
        unsigned regIndex = 0;
        for (GenTreeFieldList::Use& use : actualOp1->AsFieldList()->Uses())
        {
            genConsumeReg(use.GetNode());
            regIndex++;
        }

        // We should only have one field in the field list, and MAX_RET_REG_COUNT is 1 on Wasm.
        assert(regIndex == regCount);
        assert(regIndex == 1);

        return;
    }

    NYI_WASM("genStructReturn non-fieldlist cases");
}

void CodeGen::genEmitGSCookieCheck(bool tailCall)
{
    // TODO-WASM: GS cookie checks have limited utility on WASM since they can only help
    // with detecting linear memory stack corruption. Decide if we want them anyway.
    NYI_WASM("genEmitGSCookieCheck");
}

#ifdef PROFILING_SUPPORTED
void CodeGen::genProfilingLeaveCallback(unsigned helper)
{
    // Profiler ELT hooks are not yet implemented on WASM. The matching enter callback in
    // genFnProlog is already skipped (#if !TARGET_WASM), so emit nothing here rather than
    // asserting; this keeps WASM consistently free of ELT hooks. See #130953.
}
#endif

//------------------------------------------------------------------------
// genLoadLocalIntoReg: set the register to "load(local on stack)".
//
// Arguments:
//    targetReg - The register to load into
//    lclNum    - The local on stack to load from
//
void CodeGen::genLoadLocalIntoReg(regNumber targetReg, unsigned lclNum)
{
    LclVarDsc* varDsc = m_compiler->lvaGetDesc(lclNum);
    var_types  type   = varDsc->GetRegisterType();

    GetEmitter()->emitIns_I(INS_local_get, EA_PTRSIZE, GetFramePointerRegIndex());
    GetEmitter()->emitIns_S(ins_Load(type), emitTypeSize(type), lclNum, 0);
    GetEmitter()->emitIns_I(INS_local_set, emitTypeSize(type), WasmRegToIndex(targetReg));
}

//------------------------------------------------------------------------
// genEmitIf: Emit an 'if' instruction
//
// Arguments:
//    blockType - simple type for the block, or invalid if none
//
// Notes:
//   This emits an `if` instruction and adds a new label to the control flow stack that is not
//   modelled by the wasmControlFlowStack. Since we won't explicitly branch to the end
//   of the `if` we just need to understand that the stack is now deeper.
//
void CodeGen::genEmitIf(WasmValueType blockType)
{
    wasmExtraControlFlowDepth++;

    if (blockType != WasmValueType::Invalid)
    {
        GetEmitter()->emitIns_BlockTy(INS_if, blockType);
    }
    else
    {
        GetEmitter()->emitIns(INS_if);
    }
}

//------------------------------------------------------------------------
// genEmitEndIf: Emit an 'end' instruction closing an 'if' block
//
// Notes:
//   Removes the added stack depth from genEmitIf.
//
void CodeGen::genEmitEndIf()
{
    assert(wasmExtraControlFlowDepth > 0);
    wasmExtraControlFlowDepth--;
    GetEmitter()->emitIns(INS_end);
}

// ------------------------------------------------------------------------
// genEmitBeginBlock: Emit a 'block' instruction.
//
// Notes:
//   The block is not modeled as part of wasmControlFlowStack.
//   This is used for jump tables which don't have corresponding BasicBlock's
//   and which will be emitted within a single block with known offsets for each case.
void CodeGen::genEmitBeginBlock(WasmValueType blockType)
{
    wasmExtraControlFlowDepth++;
    if (blockType != WasmValueType::Invalid)
    {
        GetEmitter()->emitIns_BlockTy(INS_block, blockType);
    }
    else
    {
        GetEmitter()->emitIns(INS_block);
    }
}

// -----------------------------------------------------------------------
// genEmitEndBlock: Emit an 'end' instruction closing a 'block'.
//
// Notes:
//   Removes the added stack depth from genEmitBeginBlock.
void CodeGen::genEmitEndBlock()
{
    assert(wasmExtraControlFlowDepth > 0);
    wasmExtraControlFlowDepth--;
    GetEmitter()->emitIns(INS_end);
}

//------------------------------------------------------------------------
// inst_JMP: Emit a jump instruction.
//
// Arguments:
//   jmp      - kind of jump to emit
//   tgtBlock - target of the jump
//
void CodeGen::inst_JMP(emitJumpKind jmp, BasicBlock* tgtBlock)
{
    instruction    instr = emitter::emitJumpKindToIns(jmp);
    unsigned const depth = findTargetDepth(tgtBlock) + wasmExtraControlFlowDepth;
    GetEmitter()->emitIns_J(instr, EA_4BYTE, depth, tgtBlock);
}

#if defined(DEBUG)

//------------------------------------------------------------------------
// genWasmEmitterUnitTestsSimd: Exercise the packed SIMD instruction emit
//   functions added for Wasm (v128.const, extract/replace lane, shuffle,
//   load/store lane, and plain-opcode SIMD instructions).
//
//   This is a temporary debug-only test that verifies the encoding paths
//   do not assert or crash. Each instruction is emitted with valid stack
//   operands so the resulting bytecode is semantically valid Wasm.
//
void CodeGen::genWasmEmitterUnitTestsSimd()
{
    emitter* emit = GetEmitter();

    // Helper macros to push typed constants, ensuring valid stack state.
    // clang-format off
#define PUSH_V128(bytes) emit->emitIns_V128Imm(INS_v128_const, (bytes))
#define PUSH_I32(val)    emit->emitIns_I(INS_i32_const, EA_4BYTE, (val))
#define PUSH_I64(val)    emit->emitIns_I(INS_i64_const, EA_8BYTE, (val))
#define PUSH_F32(val)    emit->emitIns_I(INS_f32_const, EA_4BYTE, (val))
#define PUSH_F64(val)    emit->emitIns_I(INS_f64_const, EA_8BYTE, (val))
#define DROP             emit->emitIns(INS_drop)

    // Unary v128 -> result: push operand, emit instruction, drop result
#define TEST_UNARY_V128(bytes, ins) \
    PUSH_V128(bytes);               \
    emit->emitIns(ins);             \
    DROP

    // Binary v128 x v128 -> v128: push two operands, emit instruction, drop result
#define TEST_BINARY_V128(bytes, ins) \
    PUSH_V128(bytes);                \
    PUSH_V128(bytes);                \
    emit->emitIns(ins);                  \
    DROP

    // Extract lane: v128 -> scalar (i32/i64/f32/f64), then drop
#define TEST_EXTRACT_LANE(bytes, ins, lane) \
    PUSH_V128(bytes);                             \
    emit->emitIns_Lane(ins, lane);              \
    DROP

    // Replace lane: [v128, scalar] -> v128, then drop
#define TEST_REPLACE_LANE_I32(bytes, ins, lane) \
    PUSH_V128(bytes);                                 \
    PUSH_I32(42);                                     \
    emit->emitIns_Lane(ins, lane);                  \
    DROP

#define TEST_REPLACE_LANE_I64(bytes, ins, lane) \
    PUSH_V128(bytes);                                 \
    PUSH_I64(42);                                     \
    emit->emitIns_Lane(ins, lane);                  \
    DROP

#define TEST_REPLACE_LANE_F32(bytes, ins, lane) \
    PUSH_V128(bytes);                                 \
    PUSH_F32(0);                                      \
    emit->emitIns_Lane(ins, lane);                  \
    DROP

#define TEST_REPLACE_LANE_F64(bytes, ins, lane) \
    PUSH_V128(bytes);                                 \
    PUSH_F64(0);                                      \
    emit->emitIns_Lane(ins, lane);                  \
    DROP

    // Load lane: [i32_addr, v128] -> v128, then drop
#define TEST_LOAD_LANE(bytes, ins, attr, offset, lane) \
    PUSH_I32(0);                                       \
    PUSH_V128(bytes);                                  \
    emit->emitIns_MemargLane(ins, attr, offset, lane); \
    DROP

    // Store lane: [i32_addr, v128] -> void
#define TEST_STORE_LANE(bytes, ins, attr, offset, lane) \
    PUSH_I32(0);                                        \
    PUSH_V128(bytes);                                   \
    emit->emitIns_MemargLane(ins, attr, offset, lane)

    // Shuffle: [v128, v128] -> v128, then drop
#define TEST_SHUFFLE(bytes, shuffleBytes) \
    PUSH_V128(bytes);                     \
    PUSH_V128(bytes);                     \
    emit->emitIns_V128Imm(INS_i8x16_shuffle, shuffleBytes); \
    DROP
    // clang-format on

    // --- IF_V128: v128.const with 16 raw bytes ---
    const uint8_t v128Bytes[16] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
                                   0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F};
    PUSH_V128(v128Bytes);
    DROP;

    // All-zeros and all-ones constants
    const uint8_t v128Zeros[16] = {0};
    PUSH_V128(v128Zeros);
    DROP;

    const uint8_t v128Ones[16] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
                                  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
    PUSH_V128(v128Ones);
    DROP;

    // --- IF_LANE: extract/replace lane instructions ---
    // i8x16 lanes (0..15)
    TEST_EXTRACT_LANE(v128Ones, INS_i8x16_extract_lane_s, 0);
    TEST_EXTRACT_LANE(v128Ones, INS_i8x16_extract_lane_u, 15);
    TEST_REPLACE_LANE_I32(v128Ones, INS_i8x16_replace_lane, 7);

    // i16x8 lanes (0..7)
    TEST_EXTRACT_LANE(v128Ones, INS_i16x8_extract_lane_s, 0);
    TEST_EXTRACT_LANE(v128Ones, INS_i16x8_extract_lane_u, 7);
    TEST_REPLACE_LANE_I32(v128Ones, INS_i16x8_replace_lane, 3);

    // i32x4 lanes (0..3)
    TEST_EXTRACT_LANE(v128Ones, INS_i32x4_extract_lane, 0);
    TEST_REPLACE_LANE_I32(v128Ones, INS_i32x4_replace_lane, 3);

    // i64x2 lanes (0..1)
    TEST_EXTRACT_LANE(v128Ones, INS_i64x2_extract_lane, 0);
    TEST_REPLACE_LANE_I64(v128Ones, INS_i64x2_replace_lane, 1);

    // f32x4 lanes (0..3)
    TEST_EXTRACT_LANE(v128Ones, INS_f32x4_extract_lane, 3);
    TEST_REPLACE_LANE_F32(v128Ones, INS_f32x4_replace_lane, 0);

    // f64x2 lanes (0..1)
    TEST_EXTRACT_LANE(v128Ones, INS_f64x2_extract_lane, 0);
    TEST_REPLACE_LANE_F64(v128Ones, INS_f64x2_replace_lane, 1);

    // --- IF_MEMARG_LANE: load/store lane with memarg ---
    TEST_LOAD_LANE(v128Ones, INS_v128_load8_lane, EA_1BYTE, 0, 5);
    TEST_LOAD_LANE(v128Ones, INS_v128_load16_lane, EA_2BYTE, 16, 3);
    TEST_LOAD_LANE(v128Ones, INS_v128_load32_lane, EA_4BYTE, 64, 2);
    TEST_LOAD_LANE(v128Ones, INS_v128_load64_lane, EA_8BYTE, 128, 1);
    TEST_STORE_LANE(v128Ones, INS_v128_store8_lane, EA_1BYTE, 0, 0);
    TEST_STORE_LANE(v128Ones, INS_v128_store16_lane, EA_2BYTE, 8, 7);
    TEST_STORE_LANE(v128Ones, INS_v128_store32_lane, EA_4BYTE, 32, 1);
    TEST_STORE_LANE(v128Ones, INS_v128_store64_lane, EA_8BYTE, 256, 0);

    // --- IF_V128: i8x16.shuffle with 16 lane-index bytes ---
    // Identity shuffle
    const uint8_t identityShuffle[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
    TEST_SHUFFLE(v128Bytes, identityShuffle);

    // Reverse bytes
    const uint8_t reverseShuffle[16] = {15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0};
    TEST_SHUFFLE(v128Bytes, reverseShuffle);

    // Cross-operand shuffle (indices 16..31 refer to the second operand)
    const uint8_t crossShuffle[16] = {0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31};
    TEST_SHUFFLE(v128Bytes, crossShuffle);

    // --- IF_OPCODE: plain opcode SIMD instructions (representative sample) ---
    // Splat operations: push scalar, splat to v128, drop
    PUSH_I32(1);
    emit->emitIns(INS_i8x16_splat);
    DROP;

    PUSH_I32(2);
    emit->emitIns(INS_i16x8_splat);
    DROP;

    PUSH_I32(3);
    emit->emitIns(INS_i32x4_splat);
    DROP;

    PUSH_I64(4);
    emit->emitIns(INS_i64x2_splat);
    DROP;

    PUSH_F32(0);
    emit->emitIns(INS_f32x4_splat);
    DROP;

    PUSH_F64(0);
    emit->emitIns(INS_f64x2_splat);
    DROP;

    // Swizzle: [v128, v128] -> v128
    TEST_BINARY_V128(v128Ones, INS_i8x16_swizzle);

    // A few comparisons: [v128, v128] -> v128
    TEST_BINARY_V128(v128Ones, INS_i8x16_eq);
    TEST_BINARY_V128(v128Ones, INS_i32x4_ne);
    TEST_BINARY_V128(v128Ones, INS_f64x2_lt);

    // A few arithmetic ops
    TEST_BINARY_V128(v128Ones, INS_i8x16_add);
    TEST_BINARY_V128(v128Ones, INS_i32x4_mul);
    TEST_UNARY_V128(v128Ones, INS_f32x4_sqrt);
    TEST_UNARY_V128(v128Ones, INS_f64x2_neg);

    // Bitwise ops
    TEST_UNARY_V128(v128Ones, INS_v128_not);
    TEST_BINARY_V128(v128Ones, INS_v128_and);
    TEST_BINARY_V128(v128Ones, INS_v128_or);
    TEST_BINARY_V128(v128Ones, INS_v128_xor);
    TEST_BINARY_V128(v128Ones, INS_v128_andnot);

    // Bitmask / any_true / all_true: v128 -> i32
    TEST_UNARY_V128(v128Ones, INS_v128_any_true);
    TEST_UNARY_V128(v128Ones, INS_i8x16_all_true);
    TEST_UNARY_V128(v128Ones, INS_i32x4_bitmask);

    // Conversion operations: v128 -> v128
    TEST_UNARY_V128(v128Ones, INS_f32x4_convert_s_i32x4);
    TEST_UNARY_V128(v128Ones, INS_f64x2_convert_low_u_i32x4);
    TEST_UNARY_V128(v128Ones, INS_i32x4_trunc_sat_s_f32x4);

#undef PUSH_V128
#undef PUSH_I32
#undef PUSH_I64
#undef PUSH_F32
#undef PUSH_F64
#undef DROP
#undef TEST_UNARY_V128
#undef TEST_BINARY_V128
#undef TEST_EXTRACT_LANE
#undef TEST_REPLACE_LANE_I32
#undef TEST_REPLACE_LANE_I64
#undef TEST_REPLACE_LANE_F32
#undef TEST_REPLACE_LANE_F64
#undef TEST_LOAD_LANE
#undef TEST_STORE_LANE
#undef TEST_SHUFFLE
}

#endif // defined(DEBUG)

void CodeGen::genCreateAndStoreGCInfo(unsigned codeSize, unsigned prologSize, unsigned epilogSize DEBUGARG(void* code))
{
    IAllocator*    allowZeroAlloc = new (m_compiler, CMK_GC) CompIAllocator(m_compiler->getAllocatorGC());
    GcInfoEncoder* gcInfoEncoder  = new (m_compiler, CMK_GC)
        GcInfoEncoder(m_compiler->info.compCompHnd, m_compiler->info.compMethodInfo, allowZeroAlloc, NOMEM);
    assert(gcInfoEncoder != nullptr);

    // Find the max Virtual IP.
    //
    unsigned maxVirtualIP = 0;
    for (FuncInfoDsc* const func : m_compiler->Funcs())
    {
        maxVirtualIP = max(maxVirtualIP, func->endVirtualIP);
    }

    // Runtime wants us to report twice the actual Virtual IP range as code size.
    // Use 1 as the prolog size.
    //
    codeSize   = 2 * maxVirtualIP;
    prologSize = 1;

    // Follow the code pattern of the x86 gc info encoder (genCreateAndStoreGCInfoJIT32).
    gcInfo.gcInfoBlockHdrSave(gcInfoEncoder, codeSize, prologSize);

    // We keep the call count for the second call to gcMakeRegPtrTable() below.
    unsigned callCnt = 0;

    // First we figure out the encoder ID's for the stack slots and registers.
    gcInfo.gcMakeRegPtrTable(gcInfoEncoder, codeSize, prologSize, GCInfo::MAKE_REG_PTR_MODE_ASSIGN_SLOTS, &callCnt);

    // Now we've requested all the slots we'll need; "finalize" these (make more compact data structures for them).
    gcInfoEncoder->FinalizeSlotIds();

    // Now we can actually use those slot ID's to declare live ranges.
    gcInfo.gcMakeRegPtrTable(gcInfoEncoder, codeSize, prologSize, GCInfo::MAKE_REG_PTR_MODE_DO_WORK, &callCnt);

    if (m_compiler->opts.IsReversePInvoke())
    {
        unsigned reversePInvokeFrameVarNumber = m_compiler->lvaReversePInvokeFrameVar;
        assert(reversePInvokeFrameVarNumber != BAD_VAR_NUM);
        const LclVarDsc* reversePInvokeFrameVar = m_compiler->lvaGetDesc(reversePInvokeFrameVarNumber);
        gcInfoEncoder->SetReversePInvokeFrameSlot(reversePInvokeFrameVar->GetStackOffset());
    }

    gcInfoEncoder->Build();

    // GC Encoder automatically puts the GC info in the right spot using ICorJitInfo::allocGCInfo(size_t)
    // let's save the values anyway for debugging purposes
    m_compiler->compInfoBlkAddr = gcInfoEncoder->Emit();
    m_compiler->compInfoBlkSize = gcInfoEncoder->GetEncodedGCInfoSize();
}

//---------------------------------------------------------------------
// genReportEH - report EH info to the VM
//
void CodeGen::genReportEH()
{
    // We created the EH info earlier, during fgWasmVirtualIP.
    //
    EHClauseInfo* const info = m_compiler->fgWasmEHInfo;
    if (info != nullptr)
    {

        // Tell the VM how many EH clauses to expect.
        m_compiler->eeSetEHcount(m_compiler->compHndBBtabCount);
        m_compiler->Metrics.EHClauseCount = (int)m_compiler->compHndBBtabCount;

        genReportEHClauses(info);
    }
}

//---------------------------------------------------------------------
// genTotalFrameSize - return the total size of the linear memory stack frame.
//
// Return value:
//    Total linear memory frame size
//
int CodeGenInterface::genTotalFrameSize() const
{
    assert(m_compiler->compLclFrameSize >= 0);
    return m_compiler->compLclFrameSize;
}

//---------------------------------------------------------------------
// genSPtoFPdelta - return the offset from the initial SP to the frame pointer in linear memory.
// This number should be zero on wasm, since Initial SP = FP.
//
// There must be a frame pointer to call this function!
int CodeGenInterface::genSPtoFPdelta() const
{
    unreached();
}

//---------------------------------------------------------------------
// genCallerSPtoFPdelta - return the offset from Caller-SP to the frame pointer in linear memory.
// This number is going to be negative, since the Caller-SP is at a higher
// address than the frame pointer.
//
// There must be a frame pointer to call this function!
int CodeGenInterface::genCallerSPtoFPdelta() const
{
    unreached();
}

//---------------------------------------------------------------------
// genCallerSPtoInitialSPdelta - return the offset from Caller-SP to Initial SP in linear memory.
//
// This number will be negative.
int CodeGenInterface::genCallerSPtoInitialSPdelta() const
{
    unreached();
}

void RegSet::verifyRegUsed(regNumber reg)
{
}