diff --git a/compiler/rustc_codegen_cranelift/build_system/stdarch_skip/aarch64_core.txt b/compiler/rustc_codegen_cranelift/build_system/stdarch_skip/aarch64_core.txt
new file mode 100644
index 0000000000000..3a028cd380029
--- /dev/null
+++ b/compiler/rustc_codegen_cranelift/build_system/stdarch_skip/aarch64_core.txt
@@ -0,0 +1,301 @@
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diff --git a/compiler/rustc_codegen_cranelift/build_system/stdarch_skip/aarch64_intrinsics_clang.txt b/compiler/rustc_codegen_cranelift/build_system/stdarch_skip/aarch64_intrinsics_clang.txt
new file mode 100644
index 0000000000000..5f11867fd3ee9
--- /dev/null
+++ b/compiler/rustc_codegen_cranelift/build_system/stdarch_skip/aarch64_intrinsics_clang.txt
@@ -0,0 +1 @@
+vcvth_s16_f16
diff --git a/compiler/rustc_codegen_cranelift/build_system/stdarch_skip/aarch64_intrinsics_common.txt b/compiler/rustc_codegen_cranelift/build_system/stdarch_skip/aarch64_intrinsics_common.txt
new file mode 100644
index 0000000000000..a452f0c16b593
--- /dev/null
+++ b/compiler/rustc_codegen_cranelift/build_system/stdarch_skip/aarch64_intrinsics_common.txt
@@ -0,0 +1,1173 @@
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+vsudotq_lane_s32
+vsudotq_laneq_s32
+vtbl2_p8
+vtbl2_s8
+vtbl2_u8
+vtbl3_p8
+vtbl3_s8
+vtbl3_u8
+vtbl4_p8
+vtbl4_s8
+vtbl4_u8
+vtbx1_p8
+vtbx1_s8
+vtbx1_u8
+vtbx2_p8
+vtbx2_s8
+vtbx2_u8
+vtbx3_p8
+vtbx3_s8
+vtbx3_u8
+vtbx4_p8
+vtbx4_s8
+vtbx4_u8
+vuqadd_s16
+vuqadd_s32
+vuqadd_s64
+vuqadd_s8
+vuqaddb_s8
+vuqaddd_s64
+vuqaddh_s16
+vuqaddq_s16
+vuqaddq_s32
+vuqaddq_s64
+vuqaddq_s8
+vuqadds_s32
+vusdot_lane_s32
+vusdot_laneq_s32
+vusdot_s32
+vusdotq_lane_s32
+vusdotq_laneq_s32
+vusdotq_s32
+vusmmlaq_s32
diff --git a/compiler/rustc_codegen_cranelift/build_system/tests.rs b/compiler/rustc_codegen_cranelift/build_system/tests.rs
index 5ae76dc1e591e..3b9ae2608abfe 100644
--- a/compiler/rustc_codegen_cranelift/build_system/tests.rs
+++ b/compiler/rustc_codegen_cranelift/build_system/tests.rs
@@ -1,4 +1,5 @@
 use std::ffi::OsStr;
+use std::fs;
 use std::path::PathBuf;
 use std::process::Command;
 
@@ -108,7 +109,6 @@ const BASE_SYSROOT_SUITE: &[TestCase] = &[
     }),
     TestCase::build_bin_and_run("aot.issue-72793", "example/issue-72793.rs", &[]),
     TestCase::build_bin("aot.issue-59326", "example/issue-59326.rs"),
-    TestCase::build_bin_and_run("aot.neon", "example/neon.rs", &[]),
     TestCase::build_bin_and_run("aot.gen_block_iterate", "example/gen_block_iterate.rs", &[]),
     TestCase::build_bin_and_run("aot.raw-dylib", "example/raw-dylib.rs", &[]),
     TestCase::custom("test.sysroot", &|runner| {
@@ -182,6 +182,12 @@ static SYSROOT_TESTS_SRC: RelPath = RelPath::build("sysroot_tests");
 
 static SYSROOT_TESTS: CargoProject = CargoProject::new(SYSROOT_TESTS_SRC, "sysroot_tests_target");
 
+static STDARCH_SRC: RelPath = RelPath::build("stdarch");
+
+static STDARCH: CargoProject = CargoProject::new(STDARCH_SRC, "stdarch_target");
+static STDARCH_RUST_PROGRAMS: CargoProject =
+    CargoProject::new(RelPath::build("stdarch/rust_programs"), "stdarch_rust_programs_target");
+
 const EXTENDED_SYSROOT_SUITE: &[TestCase] = &[
     TestCase::custom("test.rust-random/rand", &|runner| {
         RAND_REPO.patch(&runner.dirs);
@@ -283,6 +289,116 @@ const EXTENDED_SYSROOT_SUITE: &[TestCase] = &[
             spawn_and_wait(test_cmd);
         }
     }),
+    TestCase::custom("test.stdarch-core", &|runner| {
+        let target = runner.target_compiler.target.as_str();
+        let (arch, _) = target.split_once('-').unwrap();
+
+        // FIXME: Add support for remaining architectures.
+        if !["aarch64"].contains(&arch) {
+            eprintln!("Skipping `stdarch-core` tests: unsupported target");
+            return;
+        }
+
+        apply_patches(
+            &runner.dirs,
+            "stdarch",
+            &runner.stdlib_source.join("library/stdarch"),
+            &STDARCH_SRC.to_path(&runner.dirs),
+        );
+
+        STDARCH.clean(&runner.dirs);
+
+        let skip = format!("build_system/stdarch_skip/{arch}_core.txt");
+        let skip = fs::read_to_string(runner.dirs.source_dir.join(skip)).unwrap_or_default();
+
+        let skip_functions = skip
+            .lines()
+            .map(str::trim)
+            .filter(|line| !line.is_empty() && !line.starts_with('#'))
+            .collect::<Vec<_>>()
+            .join(",");
+
+        if runner.is_native {
+            let mut test_cmd = STDARCH.test(&runner.target_compiler, &runner.dirs);
+
+            test_cmd.env("TARGET", target);
+            test_cmd.env("STDARCH_TEST_SKIP_FUNCTION", &skip_functions);
+
+            test_cmd.args(["-p", "core_arch", "--tests", "--", "-q"]);
+            spawn_and_wait(test_cmd);
+        } else {
+            eprintln!("Cross-Compiling: Not running tests");
+            let mut build_cmd = STDARCH.build(&runner.target_compiler, &runner.dirs);
+
+            build_cmd.env("TARGET", target);
+
+            build_cmd.args(["-p", "core_arch", "--tests"]);
+            spawn_and_wait(build_cmd);
+        }
+    }),
+    TestCase::custom("test.stdarch-intrinsics", &|runner| {
+        let target = runner.target_compiler.target.as_str();
+        let (arch, _) = target.split_once('-').unwrap();
+
+        // FIXME: Add support for remaining architectures.
+        let input = match arch {
+            "aarch64" => "intrinsics_data/arm_intrinsics.json",
+            _ => {
+                eprintln!("Skipping `stdarch-intrinsics` tests: unsupported target");
+                return;
+            }
+        };
+
+        apply_patches(
+            &runner.dirs,
+            "stdarch",
+            &runner.stdlib_source.join("library/stdarch"),
+            &STDARCH_SRC.to_path(&runner.dirs),
+        );
+
+        STDARCH_RUST_PROGRAMS.clean(&runner.dirs);
+
+        if !runner.is_native {
+            eprintln!("Cross-Compiling: Not running tests");
+            return;
+        }
+
+        let cc = if target.contains("apple") { "clang" } else { "gcc" };
+
+        let mut generate_cmd = STDARCH.run(&runner.target_compiler, &runner.dirs);
+        generate_cmd.current_dir(STDARCH.source_dir(&runner.dirs));
+        generate_cmd.args([
+            "-p",
+            "intrinsic-test",
+            "--",
+            input,
+            "--target",
+            target,
+            "--cc-arg-style",
+            cc,
+            "--skip",
+            &format!("crates/intrinsic-test/missing_{arch}_common.txt"),
+            "--skip",
+            &format!("crates/intrinsic-test/missing_{arch}_{cc}.txt"),
+        ]);
+
+        for skip in [
+            format!("build_system/stdarch_skip/{arch}_intrinsics_common.txt"),
+            format!("build_system/stdarch_skip/{arch}_intrinsics_{cc}.txt"),
+        ] {
+            let skip = runner.dirs.source_dir.join(skip);
+
+            if skip.exists() {
+                generate_cmd.arg("--skip").arg(skip);
+            }
+        }
+
+        spawn_and_wait(generate_cmd);
+
+        let mut test_cmd = STDARCH_RUST_PROGRAMS.test(&runner.target_compiler, &runner.dirs);
+        test_cmd.args(["--workspace", "--tests", "--no-fail-fast", "--", "-q"]);
+        spawn_and_wait(test_cmd);
+    }),
 ];
 
 pub(crate) fn run_tests(
diff --git a/compiler/rustc_codegen_cranelift/config.txt b/compiler/rustc_codegen_cranelift/config.txt
index ca126f4e39e29..c1068e6257d73 100644
--- a/compiler/rustc_codegen_cranelift/config.txt
+++ b/compiler/rustc_codegen_cranelift/config.txt
@@ -22,7 +22,6 @@ aot.float-minmax-pass
 aot.powi_libcall_signature
 aot.issue-72793
 aot.issue-59326
-aot.neon
 aot.gen_block_iterate
 aot.raw-dylib
 test.sysroot
@@ -32,3 +31,5 @@ test.rust-random/rand
 test.regex
 test.graviola
 test.portable-simd
+test.stdarch-core
+test.stdarch-intrinsics
diff --git a/compiler/rustc_codegen_cranelift/example/neon.rs b/compiler/rustc_codegen_cranelift/example/neon.rs
deleted file mode 100644
index ba63333daa339..0000000000000
--- a/compiler/rustc_codegen_cranelift/example/neon.rs
+++ /dev/null
@@ -1,963 +0,0 @@
-// Most of these tests are copied from https://github.com/japaric/stdsimd/blob/0f4413d01c4f0c3ffbc5a69e9a37fbc7235b31a9/coresimd/arm/neon.rs
-
-#![cfg_attr(target_arch = "aarch64", feature(portable_simd))]
-
-#[cfg(target_arch = "aarch64")]
-use std::arch::aarch64::*;
-#[cfg(target_arch = "aarch64")]
-use std::mem::transmute;
-#[cfg(target_arch = "aarch64")]
-use std::simd::*;
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "crc")]
-unsafe fn test_crc32() {
-    assert!(std::arch::is_aarch64_feature_detected!("crc"));
-
-    let a: u32 = 42;
-    let b: u64 = 0xdeadbeef;
-
-    assert_eq!(__crc32b(a, b as u8), 0xEB0E363F);
-    assert_eq!(__crc32h(a, b as u16), 0x9A54BD80);
-    assert_eq!(__crc32w(a, b as u32), 0xF491F059);
-    assert_eq!(__crc32d(a, b as u64), 0xD14BBEA6);
-
-    assert_eq!(__crc32cb(a, b as u8), 0xF67C32D8);
-    assert_eq!(__crc32ch(a, b as u16), 0x479108B8);
-    assert_eq!(__crc32cw(a, b as u32), 0x979F49F8);
-    assert_eq!(__crc32cd(a, b as u64), 0x0E6BE593);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpmin_s8() {
-    let a = i8x8::from([1, -2, 3, -4, 5, 6, 7, 8]);
-    let b = i8x8::from([0, 3, 2, 5, 4, 7, 6, 9]);
-    let e = i8x8::from([-2, -4, 5, 7, 0, 2, 4, 6]);
-    let r: i8x8 = unsafe { transmute(vpmin_s8(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpmin_s16() {
-    let a = i16x4::from([1, 2, 3, -4]);
-    let b = i16x4::from([0, 3, 2, 5]);
-    let e = i16x4::from([1, -4, 0, 2]);
-    let r: i16x4 = unsafe { transmute(vpmin_s16(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpmin_s32() {
-    let a = i32x2::from([1, -2]);
-    let b = i32x2::from([0, 3]);
-    let e = i32x2::from([-2, 0]);
-    let r: i32x2 = unsafe { transmute(vpmin_s32(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpmin_u8() {
-    let a = u8x8::from([1, 2, 3, 4, 5, 6, 7, 8]);
-    let b = u8x8::from([0, 3, 2, 5, 4, 7, 6, 9]);
-    let e = u8x8::from([1, 3, 5, 7, 0, 2, 4, 6]);
-    let r: u8x8 = unsafe { transmute(vpmin_u8(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpmin_u16() {
-    let a = u16x4::from([1, 2, 3, 4]);
-    let b = u16x4::from([0, 3, 2, 5]);
-    let e = u16x4::from([1, 3, 0, 2]);
-    let r: u16x4 = unsafe { transmute(vpmin_u16(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpmin_u32() {
-    let a = u32x2::from([1, 2]);
-    let b = u32x2::from([0, 3]);
-    let e = u32x2::from([1, 0]);
-    let r: u32x2 = unsafe { transmute(vpmin_u32(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpmin_f32() {
-    let a = f32x2::from([1., -2.]);
-    let b = f32x2::from([0., 3.]);
-    let e = f32x2::from([-2., 0.]);
-    let r: f32x2 = unsafe { transmute(vpmin_f32(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpmax_s8() {
-    let a = i8x8::from([1, -2, 3, -4, 5, 6, 7, 8]);
-    let b = i8x8::from([0, 3, 2, 5, 4, 7, 6, 9]);
-    let e = i8x8::from([1, 3, 6, 8, 3, 5, 7, 9]);
-    let r: i8x8 = unsafe { transmute(vpmax_s8(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpmax_s16() {
-    let a = i16x4::from([1, 2, 3, -4]);
-    let b = i16x4::from([0, 3, 2, 5]);
-    let e = i16x4::from([2, 3, 3, 5]);
-    let r: i16x4 = unsafe { transmute(vpmax_s16(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpmax_s32() {
-    let a = i32x2::from([1, -2]);
-    let b = i32x2::from([0, 3]);
-    let e = i32x2::from([1, 3]);
-    let r: i32x2 = unsafe { transmute(vpmax_s32(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpmax_u8() {
-    let a = u8x8::from([1, 2, 3, 4, 5, 6, 7, 8]);
-    let b = u8x8::from([0, 3, 2, 5, 4, 7, 6, 9]);
-    let e = u8x8::from([2, 4, 6, 8, 3, 5, 7, 9]);
-    let r: u8x8 = unsafe { transmute(vpmax_u8(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpmax_u16() {
-    let a = u16x4::from([1, 2, 3, 4]);
-    let b = u16x4::from([0, 3, 2, 5]);
-    let e = u16x4::from([2, 4, 3, 5]);
-    let r: u16x4 = unsafe { transmute(vpmax_u16(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpmax_u32() {
-    let a = u32x2::from([1, 2]);
-    let b = u32x2::from([0, 3]);
-    let e = u32x2::from([2, 3]);
-    let r: u32x2 = unsafe { transmute(vpmax_u32(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpmax_f32() {
-    let a = f32x2::from([1., -2.]);
-    let b = f32x2::from([0., 3.]);
-    let e = f32x2::from([1., 3.]);
-    let r: f32x2 = unsafe { transmute(vpmax_f32(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpadd_s16() {
-    let a = i16x4::from([1, 2, 3, 4]);
-    let b = i16x4::from([0, -1, -2, -3]);
-    let r: i16x4 = unsafe { transmute(vpadd_s16(transmute(a), transmute(b))) };
-    let e = i16x4::from([3, 7, -1, -5]);
-    assert_eq!(r, e);
-}
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpadd_s32() {
-    let a = i32x2::from([1, 2]);
-    let b = i32x2::from([0, -1]);
-    let r: i32x2 = unsafe { transmute(vpadd_s32(transmute(a), transmute(b))) };
-    let e = i32x2::from([3, -1]);
-    assert_eq!(r, e);
-}
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpadd_s8() {
-    let a = i8x8::from([1, 2, 3, 4, 5, 6, 7, 8]);
-    let b = i8x8::from([0, -1, -2, -3, -4, -5, -6, -7]);
-    let r: i8x8 = unsafe { transmute(vpadd_s8(transmute(a), transmute(b))) };
-    let e = i8x8::from([3, 7, 11, 15, -1, -5, -9, -13]);
-    assert_eq!(r, e);
-}
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpadd_u16() {
-    let a = u16x4::from([1, 2, 3, 4]);
-    let b = u16x4::from([30, 31, 32, 33]);
-    let r: u16x4 = unsafe { transmute(vpadd_u16(transmute(a), transmute(b))) };
-    let e = u16x4::from([3, 7, 61, 65]);
-    assert_eq!(r, e);
-}
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpadd_u32() {
-    let a = u32x2::from([1, 2]);
-    let b = u32x2::from([30, 31]);
-    let r: u32x2 = unsafe { transmute(vpadd_u32(transmute(a), transmute(b))) };
-    let e = u32x2::from([3, 61]);
-    assert_eq!(r, e);
-}
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpadd_u8() {
-    let a = u8x8::from([1, 2, 3, 4, 5, 6, 7, 8]);
-    let b = u8x8::from([30, 31, 32, 33, 34, 35, 36, 37]);
-    let r: u8x8 = unsafe { transmute(vpadd_u8(transmute(a), transmute(b))) };
-    let e = u8x8::from([3, 7, 11, 15, 61, 65, 69, 73]);
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vqsub_u8() {
-    let a = u8x8::from([1, 2, 3, 4, 5, 6, 7, 0xff]);
-    let b = u8x8::from([30, 1, 1, 1, 34, 0xff, 36, 37]);
-    let r: u8x8 = unsafe { transmute(vqsub_u8(transmute(a), transmute(b))) };
-    let e = u8x8::from([0, 1, 2, 3, 0, 0, 0, 218]);
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vqadd_u8() {
-    let a = u8x8::from([1, 2, 3, 4, 5, 6, 7, 0xff]);
-    let b = u8x8::from([30, 1, 1, 1, 34, 0xff, 36, 37]);
-    let r: u8x8 = unsafe { transmute(vqadd_u8(transmute(a), transmute(b))) };
-    let e = u8x8::from([31, 3, 4, 5, 39, 0xff, 43, 0xff]);
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vmaxq_f32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.fmax.v4f32
-    let a = f32x4::from([0., -1., 2., -3.]);
-    let b = f32x4::from([-4., 5., -6., 7.]);
-    let e = f32x4::from([0., 5., 2., 7.]);
-    let r: f32x4 = unsafe { transmute(vmaxq_f32(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vminq_f32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.fmin.v4f32
-    let a = f32x4::from([0., -1., 2., -3.]);
-    let b = f32x4::from([-4., 5., -6., 7.]);
-    let e = f32x4::from([-4., -1., -6., -3.]);
-    let r: f32x4 = unsafe { transmute(vminq_f32(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vaddvq_f32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.faddv.f32.v4f32
-    let a = f32x4::from([0., 1., 2., 3.]);
-    let e = 6f32;
-    let r = unsafe { vaddvq_f32(transmute(a)) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vrndnq_f32() {
-    // llvm intrinsic: llvm.roundeven.v4f32
-    let a = f32x4::from([0.1, -1.9, 4.5, 5.5]);
-    let e = f32x4::from([0., -2., 4., 6.]);
-    let r: f32x4 = unsafe { transmute(vrndnq_f32(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "aes")]
-unsafe fn test_vaeseq_u8() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.aese
-    let a = u8x16::from([0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]);
-    let b = u8x16::from([16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]);
-    let e = u8x16::from([
-        0xca, 0xca, 0xca, 0xca, 0xca, 0xca, 0xca, 0xca, 0xca, 0xca, 0xca, 0xca, 0xca, 0xca, 0xca,
-        0xca,
-    ]);
-    let r: u8x16 = unsafe { transmute(vaeseq_u8(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "aes")]
-unsafe fn test_vaesdq_u8() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.aesd
-    let a = u8x16::from([0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]);
-    let b = u8x16::from([16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]);
-    let e = u8x16::from([
-        0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c,
-        0x7c,
-    ]);
-    let r: u8x16 = unsafe { transmute(vaesdq_u8(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "aes")]
-unsafe fn test_vaesmcq_u8() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.aesmc
-    let a = u8x16::from([0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]);
-    let e = u8x16::from([2, 7, 0, 5, 6, 3, 4, 1, 10, 15, 8, 13, 14, 11, 12, 9]);
-    let r: u8x16 = unsafe { transmute(vaesmcq_u8(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "aes")]
-unsafe fn test_vaesimcq_u8() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.aesimc
-    let a = u8x16::from([0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]);
-    let e = u8x16::from([10, 15, 8, 13, 14, 11, 12, 9, 2, 7, 0, 5, 6, 3, 4, 1]);
-    let r: u8x16 = unsafe { transmute(vaesimcq_u8(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha2")]
-unsafe fn test_vsha1cq_u32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.sha1c
-    let a = u32x4::from([0, 1, 2, 3]);
-    let b = 8;
-    let c = u32x4::from([4, 5, 6, 7]);
-    let e = u32x4::from([0x40072911, 0x40003948, 0x80000072, 0x80000003]);
-    let r: u32x4 = unsafe { transmute(vsha1cq_u32(transmute(a), b, transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha2")]
-fn test_vsha1h_u32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.sha1h
-    let a = 8;
-    let e = 0x00000002;
-    let r = vsha1h_u32(a);
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha2")]
-unsafe fn test_vsha1mq_u32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.sha1m
-    let a = u32x4::from([0, 1, 2, 3]);
-    let b = 8;
-    let c = u32x4::from([4, 5, 6, 7]);
-    let e = u32x4::from([0x4007a107, 0x00003d08, 0x0000007a, 0xc0000003]);
-    let r: u32x4 = unsafe { transmute(vsha1mq_u32(transmute(a), b, transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha2")]
-unsafe fn test_vsha1pq_u32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.sha1p
-    let a = u32x4::from([0, 1, 2, 3]);
-    let b = 8;
-    let c = u32x4::from([4, 5, 6, 7]);
-    let e = u32x4::from([0x80062d18, 0x4000315c, 0x90000062, 0x00000003]);
-    let r: u32x4 = unsafe { transmute(vsha1pq_u32(transmute(a), b, transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha2")]
-unsafe fn test_vsha1su0q_u32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.sha1su0
-    let a = u32x4::from([0, 1, 2, 3]);
-    let b = u32x4::from([4, 5, 6, 7]);
-    let c = u32x4::from([8, 9, 10, 11]);
-    let e = u32x4::from([0x0000000a, 0x0000000b, 0x0000000c, 0x0000000d]);
-    let r: u32x4 = unsafe { transmute(vsha1su0q_u32(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha2")]
-unsafe fn test_vsha1su1q_u32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.sha1su1
-    let a = u32x4::from([0, 1, 2, 3]);
-    let b = u32x4::from([4, 5, 6, 7]);
-    let e = u32x4::from([0x0000000a, 0x0000000e, 0x0000000a, 0x00000012]);
-    let r: u32x4 = unsafe { transmute(vsha1su1q_u32(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha2")]
-unsafe fn test_vsha256hq_u32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.sha256h
-    let a = u32x4::from([0, 1, 2, 3]);
-    let b = u32x4::from([4, 5, 6, 7]);
-    let c = u32x4::from([8, 9, 10, 11]);
-    let e = u32x4::from([0x27bb4ae0, 0xd8f61f7c, 0xb7c1ecdc, 0x10800215]);
-    let r: u32x4 = unsafe { transmute(vsha256hq_u32(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha2")]
-unsafe fn test_vsha256h2q_u32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.sha256h2
-    let a = u32x4::from([0, 1, 2, 3]);
-    let b = u32x4::from([4, 5, 6, 7]);
-    let c = u32x4::from([8, 9, 10, 11]);
-    let e = u32x4::from([0x6989ee0d, 0x4b055920, 0x52800a12, 0x00000014]);
-    let r: u32x4 = unsafe { transmute(vsha256h2q_u32(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha2")]
-unsafe fn test_vsha256su0q_u32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.sha256su0
-    let a = u32x4::from([0, 1, 2, 3]);
-    let b = u32x4::from([4, 5, 6, 7]);
-    let e = u32x4::from([0x02004000, 0x04008001, 0x0600c002, 0x08010003]);
-    let r: u32x4 = unsafe { transmute(vsha256su0q_u32(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha2")]
-unsafe fn test_vsha256su1q_u32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.sha256su1
-    let a = u32x4::from([0, 1, 2, 3]);
-    let b = u32x4::from([4, 5, 6, 7]);
-    let c = u32x4::from([8, 9, 10, 11]);
-    let e = u32x4::from([0x00044005, 0x0004e007, 0xa802211b, 0xec036145]);
-    let r: u32x4 = unsafe { transmute(vsha256su1q_u32(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_vsha512hq_u64() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.sha512h
-    let a = u64x2::from([0, 1]);
-    let b = u64x2::from([2, 3]);
-    let c = u64x2::from([4, 5]);
-    let e = u64x2::from([0x001c805053800005, 0x0015400002800003]);
-    let r: u64x2 = unsafe { transmute(vsha512hq_u64(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_vsha512h2q_u64() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.sha512h2
-    let a = u64x2::from([0, 1]);
-    let b = u64x2::from([2, 3]);
-    let c = u64x2::from([4, 5]);
-    let e = u64x2::from([0x401000514a000405, 0x0000004108000005]);
-    let r: u64x2 = unsafe { transmute(vsha512h2q_u64(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_vsha512su0q_u64() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.sha512su0
-    let a = u64x2::from([0, 1]);
-    let b = u64x2::from([2, 3]);
-    let e = u64x2::from([0x8100000000000000, 0x0200000000000002]);
-    let r: u64x2 = unsafe { transmute(vsha512su0q_u64(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_vsha512su1q_u64() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.sha512su1
-    let a = u64x2::from([0, 1]);
-    let b = u64x2::from([2, 3]);
-    let c = u64x2::from([4, 5]);
-    let e = u64x2::from([0x0000400000000014, 0x000060000000001e]);
-    let r: u64x2 = unsafe { transmute(vsha512su1q_u64(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_veor3q_s8() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.eor3s.v16i8
-    let a = i8x16::from([0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]);
-    let b = i8x16::from([16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]);
-    let c = i8x16::from([32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47]);
-    let e = i8x16::from([48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63]);
-    let r: i8x16 = unsafe { transmute(veor3q_s8(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_veor3q_s16() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.eor3s.v8i16
-    let a = i16x8::from([0, 1, 2, 3, 4, 5, 6, 7]);
-    let b = i16x8::from([8, 9, 10, 11, 12, 13, 14, 15]);
-    let c = i16x8::from([16, 17, 18, 19, 20, 21, 22, 23]);
-    let e = i16x8::from([24, 25, 26, 27, 28, 29, 30, 31]);
-    let r: i16x8 = unsafe { transmute(veor3q_s16(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_veor3q_s32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.eor3s.v4i32
-    let a = i32x4::from([0, 1, 2, 3]);
-    let b = i32x4::from([4, 5, 6, 7]);
-    let c = i32x4::from([8, 9, 10, 11]);
-    let e = i32x4::from([12, 13, 14, 15]);
-    let r: i32x4 = unsafe { transmute(veor3q_s32(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_veor3q_s64() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.eor3s.v2i64
-    let a = i64x2::from([0, 1]);
-    let b = i64x2::from([2, 3]);
-    let c = i64x2::from([4, 5]);
-    let e = i64x2::from([6, 7]);
-    let r: i64x2 = unsafe { transmute(veor3q_s64(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_veor3q_u8() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.eor3u.v16i8
-    let a = u8x16::from([0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]);
-    let b = u8x16::from([16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]);
-    let c = u8x16::from([32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47]);
-    let e = u8x16::from([48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63]);
-    let r: u8x16 = unsafe { transmute(veor3q_u8(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_veor3q_u16() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.eor3u.v8i16
-    let a = u16x8::from([0, 1, 2, 3, 4, 5, 6, 7]);
-    let b = u16x8::from([8, 9, 10, 11, 12, 13, 14, 15]);
-    let c = u16x8::from([16, 17, 18, 19, 20, 21, 22, 23]);
-    let e = u16x8::from([24, 25, 26, 27, 28, 29, 30, 31]);
-    let r: u16x8 = unsafe { transmute(veor3q_u16(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_veor3q_u32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.eor3u.v4i32
-    let a = u32x4::from([0, 1, 2, 3]);
-    let b = u32x4::from([4, 5, 6, 7]);
-    let c = u32x4::from([8, 9, 10, 11]);
-    let e = u32x4::from([12, 13, 14, 15]);
-    let r: u32x4 = unsafe { transmute(veor3q_u32(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_veor3q_u64() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.eor3u.v2i64
-    let a = u64x2::from([0, 1]);
-    let b = u64x2::from([2, 3]);
-    let c = u64x2::from([4, 5]);
-    let e = u64x2::from([6, 7]);
-    let r: u64x2 = unsafe { transmute(veor3q_u64(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_vbcaxq_s8() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.bcaxs.v16i8
-    let a = i8x16::from([0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]);
-    let b = i8x16::from([16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]);
-    let c = i8x16::from([32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47]);
-    let e = i8x16::from([16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]);
-    let r: i8x16 = unsafe { transmute(vbcaxq_s8(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_vbcaxq_s16() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.bcaxs.v8i16
-    let a = i16x8::from([0, 1, 2, 3, 4, 5, 6, 7]);
-    let b = i16x8::from([8, 9, 10, 11, 12, 13, 14, 15]);
-    let c = i16x8::from([16, 17, 18, 19, 20, 21, 22, 23]);
-    let e = i16x8::from([8, 9, 10, 11, 12, 13, 14, 15]);
-    let r: i16x8 = unsafe { transmute(vbcaxq_s16(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_vbcaxq_s32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.bcaxs.v4i32
-    let a = i32x4::from([0, 1, 2, 3]);
-    let b = i32x4::from([4, 5, 6, 7]);
-    let c = i32x4::from([8, 9, 10, 11]);
-    let e = i32x4::from([4, 5, 6, 7]);
-    let r: i32x4 = unsafe { transmute(vbcaxq_s32(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_vbcaxq_s64() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.bcaxs.v2i64
-    let a = i64x2::from([0, 1]);
-    let b = i64x2::from([2, 3]);
-    let c = i64x2::from([4, 5]);
-    let e = i64x2::from([2, 3]);
-    let r: i64x2 = unsafe { transmute(vbcaxq_s64(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_vbcaxq_u8() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.bcaxu.v16i8
-    let a = u8x16::from([0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]);
-    let b = u8x16::from([16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]);
-    let c = u8x16::from([32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47]);
-    let e = u8x16::from([16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]);
-    let r: u8x16 = unsafe { transmute(vbcaxq_u8(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_vbcaxq_u16() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.bcaxu.v8i16
-    let a = u16x8::from([0, 1, 2, 3, 4, 5, 6, 7]);
-    let b = u16x8::from([8, 9, 10, 11, 12, 13, 14, 15]);
-    let c = u16x8::from([16, 17, 18, 19, 20, 21, 22, 23]);
-    let e = u16x8::from([8, 9, 10, 11, 12, 13, 14, 15]);
-    let r: u16x8 = unsafe { transmute(vbcaxq_u16(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_vbcaxq_u32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.bcaxu.v4i32
-    let a = u32x4::from([0, 1, 2, 3]);
-    let b = u32x4::from([4, 5, 6, 7]);
-    let c = u32x4::from([8, 9, 10, 11]);
-    let e = u32x4::from([4, 5, 6, 7]);
-    let r: u32x4 = unsafe { transmute(vbcaxq_u32(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_vbcaxq_u64() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.bcaxu.v2i64
-    let a = u64x2::from([0, 1]);
-    let b = u64x2::from([2, 3]);
-    let c = u64x2::from([4, 5]);
-    let e = u64x2::from([2, 3]);
-    let r: u64x2 = unsafe { transmute(vbcaxq_u64(transmute(a), transmute(b), transmute(c))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_vrax1q_u64() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.rax1
-    let a = u64x2::from([0, 1]);
-    let b = u64x2::from([2, 3]);
-    let e = u64x2::from([4, 7]);
-    let r: u64x2 = unsafe { transmute(vrax1q_u64(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "sha3")]
-unsafe fn test_vxarq_u64() {
-    // AArch64 llvm intrinsic: llvm.aarch64.crypto.xar
-    let a = u64x2::from([0, 1]);
-    let b = u64x2::from([2, 3]);
-    let e = u64x2::from([4, 4]);
-    let r: u64x2 = unsafe { transmute(vxarq_u64::<63>(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-#[target_feature(enable = "aes")]
-fn test_vmull_p64() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.pmull64
-    let a: u64 = 3;
-    let b: u64 = 6;
-    let e: u128 = 10;
-    let r: u128 = vmull_p64(a, b);
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vmull_p8() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.pmull.v8i16
-    let a = u8x8::from([0, 1, 2, 3, 4, 5, 6, 7]);
-    let b = u8x8::from([8, 9, 10, 11, 12, 13, 14, 15]);
-    let e = u16x8::from([0x0000, 0x0009, 0x0014, 0x001d, 0x0030, 0x0039, 0x0024, 0x002d]);
-    let r: u16x8 = unsafe { transmute(vmull_p8(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vqdmulh_s16() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.sqdmulh.v4i16
-    let a = i16x4::from([1, 2, 4, 8]);
-    let b = i16x4::from([16384, 16384, 16384, 16384]);
-    let e = i16x4::from([0, 1, 2, 4]);
-    let r: i16x4 = unsafe { transmute(vqdmulh_s16(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vqdmulh_s32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.sqdmulh.v2i32
-    let a = i32x2::from([1, 2]);
-    let b = i32x2::from([1073741824, 1073741824]);
-    let e = i32x2::from([0, 1]);
-    let r: i32x2 = unsafe { transmute(vqdmulh_s32(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vqdmulhq_s16() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.sqdmulh.v8i16
-    let a = i16x8::from([1, 2, 4, 8, 16, 32, 64, 128]);
-    let b = i16x8::from([16384, 16384, 16384, 16384, 16384, 16384, 16384, 16384]);
-    let e = i16x8::from([0, 1, 2, 4, 8, 16, 32, 64]);
-    let r: i16x8 = unsafe { transmute(vqdmulhq_s16(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vqdmulhq_s32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.sqdmulh.v4i32
-    let a = i32x4::from([1, 2, 4, 8]);
-    let b = i32x4::from([1073741824, 1073741824, 1073741824, 1073741824]);
-    let e = i32x4::from([0, 1, 2, 4]);
-    let r: i32x4 = unsafe { transmute(vqdmulhq_s32(transmute(a), transmute(b))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpaddl_s8() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.saddlp.v4i16.v8i8
-    let a = i8x8::from([1, 2, 3, 4, -5, -6, -7, -8]);
-    let e = i16x4::from([3, 7, -11, -15]);
-    let r: i16x4 = unsafe { transmute(vpaddl_s8(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpaddl_s16() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.saddlp.v2i32.v4i16
-    let a = i16x4::from([1, 2, -3, -4]);
-    let e = i32x2::from([3, -7]);
-    let r: i32x2 = unsafe { transmute(vpaddl_s16(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpaddl_s32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.saddlp.v1i64.v2i32
-    let a = i32x2::from([1, -2]);
-    let e = i64x1::from([-1]);
-    let r: i64x1 = unsafe { transmute(vpaddl_s32(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpaddlq_s8() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.saddlp.v8i16.v16i8
-    let a = i8x16::from([1, 2, 3, 4, 5, 6, 7, 8, -9, -10, -11, -12, -13, -14, -15, -16]);
-    let e = i16x8::from([3, 7, 11, 15, -19, -23, -27, -31]);
-    let r: i16x8 = unsafe { transmute(vpaddlq_s8(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpaddlq_s16() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.saddlp.v4i32.v8i16
-    let a = i16x8::from([1, 2, 3, 4, -5, -6, -7, -8]);
-    let e = i32x4::from([3, 7, -11, -15]);
-    let r: i32x4 = unsafe { transmute(vpaddlq_s16(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpaddlq_s32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.saddlp.v2i64.v4i32
-    let a = i32x4::from([1, 2, -3, -4]);
-    let e = i64x2::from([3, -7]);
-    let r: i64x2 = unsafe { transmute(vpaddlq_s32(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpaddl_u8() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.uaddlp.v4i16.v8i8
-    let a = u8x8::from([255, 254, 253, 252, 251, 250, 249, 248]);
-    let e = u16x4::from([509, 505, 501, 497]);
-    let r: u16x4 = unsafe { transmute(vpaddl_u8(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpaddl_u16() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.uaddlp.v2i32.v4i16
-    let a = u16x4::from([65535, 65534, 65533, 65532]);
-    let e = u32x2::from([131069, 131065]);
-    let r: u32x2 = unsafe { transmute(vpaddl_u16(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpaddl_u32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.uaddlp.v1i64.v2i32
-    let a = u32x2::from([4294967295, 4294967294]);
-    let e = u64x1::from([8589934589]);
-    let r: u64x1 = unsafe { transmute(vpaddl_u32(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpaddlq_u8() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.uaddlp.v8i16.v16i8
-    let a = u8x16::from([
-        255, 254, 253, 252, 251, 250, 249, 248, 247, 246, 245, 244, 243, 242, 241, 240,
-    ]);
-    let e = u16x8::from([509, 505, 501, 497, 493, 489, 485, 481]);
-    let r: u16x8 = unsafe { transmute(vpaddlq_u8(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpaddlq_u16() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.uaddlp.v4i32.v8i16
-    let a = u16x8::from([65535, 65534, 65533, 65532, 65531, 65530, 65529, 65528]);
-    let e = u32x4::from([131069, 131065, 131061, 131057]);
-    let r: u32x4 = unsafe { transmute(vpaddlq_u16(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-unsafe fn test_vpaddlq_u32() {
-    // AArch64 llvm intrinsic: llvm.aarch64.neon.uaddlp.v2i64.v4i32
-    let a = u32x4::from([4294967295, 4294967294, 4294967293, 4294967292]);
-    let e = u64x2::from([8589934589, 8589934585]);
-    let r: u64x2 = unsafe { transmute(vpaddlq_u32(transmute(a))) };
-    assert_eq!(r, e);
-}
-
-#[cfg(target_arch = "aarch64")]
-fn main() {
-    unsafe {
-        test_vpmin_s8();
-        test_vpmin_s16();
-        test_vpmin_s32();
-        test_vpmin_u8();
-        test_vpmin_u16();
-        test_vpmin_u32();
-        test_vpmin_f32();
-        test_vpmax_s8();
-        test_vpmax_s16();
-        test_vpmax_s32();
-        test_vpmax_u8();
-        test_vpmax_u16();
-        test_vpmax_u32();
-        test_vpmax_f32();
-
-        test_vpadd_s16();
-        test_vpadd_s32();
-        test_vpadd_s8();
-        test_vpadd_u16();
-        test_vpadd_u32();
-        test_vpadd_u8();
-
-        test_vqsub_u8();
-        test_vqadd_u8();
-
-        test_vmaxq_f32();
-        test_vminq_f32();
-        test_vaddvq_f32();
-        test_vrndnq_f32();
-
-        test_crc32();
-
-        test_vaeseq_u8();
-        test_vaesdq_u8();
-        test_vaesmcq_u8();
-        test_vaesimcq_u8();
-
-        test_vsha1cq_u32();
-        test_vsha1h_u32();
-        test_vsha1mq_u32();
-        test_vsha1pq_u32();
-        test_vsha1su0q_u32();
-        test_vsha1su1q_u32();
-
-        test_vsha256hq_u32();
-        test_vsha256h2q_u32();
-        test_vsha256su0q_u32();
-        test_vsha256su1q_u32();
-
-        if std::arch::is_aarch64_feature_detected!("sha3") {
-            test_vsha512hq_u64();
-            test_vsha512h2q_u64();
-            test_vsha512su0q_u64();
-            test_vsha512su1q_u64();
-
-            test_veor3q_s8();
-            test_veor3q_s16();
-            test_veor3q_s32();
-            test_veor3q_s64();
-            test_veor3q_u8();
-            test_veor3q_u16();
-            test_veor3q_u32();
-            test_veor3q_u64();
-
-            test_vbcaxq_s8();
-            test_vbcaxq_s16();
-            test_vbcaxq_s32();
-            test_vbcaxq_s64();
-            test_vbcaxq_u8();
-            test_vbcaxq_u16();
-            test_vbcaxq_u32();
-            test_vbcaxq_u64();
-
-            test_vrax1q_u64();
-            test_vxarq_u64();
-        }
-
-        test_vmull_p64();
-        test_vmull_p8();
-
-        test_vqdmulh_s16();
-        test_vqdmulh_s32();
-        test_vqdmulhq_s16();
-        test_vqdmulhq_s32();
-
-        test_vpaddl_s8();
-        test_vpaddl_s16();
-        test_vpaddl_s32();
-        test_vpaddlq_s8();
-        test_vpaddlq_s16();
-        test_vpaddlq_s32();
-
-        test_vpaddl_u8();
-        test_vpaddl_u16();
-        test_vpaddl_u32();
-        test_vpaddlq_u8();
-        test_vpaddlq_u16();
-        test_vpaddlq_u32();
-    }
-}
-
-#[cfg(not(target_arch = "aarch64"))]
-fn main() {}
diff --git a/compiler/rustc_codegen_cranelift/example/std_example.rs b/compiler/rustc_codegen_cranelift/example/std_example.rs
index e1287683d495d..5fc5f17682cc8 100644
--- a/compiler/rustc_codegen_cranelift/example/std_example.rs
+++ b/compiler/rustc_codegen_cranelift/example/std_example.rs
@@ -294,6 +294,19 @@ unsafe fn test_simd() {
         if is_x86_feature_detected!("avx512f") {
             test_zmm_roundtrip();
         }
+
+        #[cfg(not(jit))]
+        {
+            if is_x86_feature_detected!("pclmulqdq") {
+                test_mm_clmulepi64_si128();
+            }
+            if is_x86_feature_detected!("vpclmulqdq") {
+                test_mm256_clmulepi64_epi128();
+            }
+            if is_x86_feature_detected!("vpclmulqdq") && is_x86_feature_detected!("avx512f") {
+                test_mm512_clmulepi64_epi128();
+            }
+        }
     }
 }
 
@@ -395,6 +408,14 @@ pub fn assert_eq_m256i(a: __m256i, b: __m256i) {
     }
 }
 
+#[cfg(target_arch = "x86_64")]
+#[target_feature(enable = "avx512f")]
+pub fn assert_eq_m512i(a: __m512i, b: __m512i) {
+    unsafe {
+        assert_eq!(std::mem::transmute::<_, [u64; 8]>(a), std::mem::transmute::<_, [u64; 8]>(b))
+    }
+}
+
 #[cfg(target_arch = "x86_64")]
 #[target_feature(enable = "sse2")]
 unsafe fn test_mm_cvtsi128_si64() {
@@ -537,6 +558,62 @@ unsafe fn test_mm256_permutevar8x32_epi32() {
     assert_eq_m256i(r, e);
 }
 
+#[cfg(target_arch = "x86_64")]
+#[target_feature(enable = "pclmulqdq")]
+#[cfg(not(jit))]
+unsafe fn test_mm_clmulepi64_si128() {
+    // Constants taken from https://software.intel.com/sites/default/files/managed/72/cc/clmul-wp-rev-2.02-2014-04-20.pdf
+    let a = _mm_set_epi64x(0x7b5b546573745665, 0x63746f725d53475d);
+    let b = _mm_set_epi64x(0x4869285368617929, 0x5b477565726f6e5d);
+    let r00 = _mm_set_epi64x(0x1d4d84c85c3440c0, 0x929633d5d36f0451u64.cast_signed());
+    let r01 = _mm_set_epi64x(0x1bd17c8d556ab5a1, 0x7fa540ac2a281315);
+    let r10 = _mm_set_epi64x(0x1a2bf6db3a30862f, 0xbabf262df4b7d5c9u64.cast_signed());
+    let r11 = _mm_set_epi64x(0x1d1e1f2c592e7c45, 0xd66ee03e410fd4edu64.cast_signed());
+
+    assert_eq_m128i(_mm_clmulepi64_si128::<0x00>(a, b), r00);
+    assert_eq_m128i(_mm_clmulepi64_si128::<0x10>(a, b), r01);
+    assert_eq_m128i(_mm_clmulepi64_si128::<0x01>(a, b), r10);
+    assert_eq_m128i(_mm_clmulepi64_si128::<0x11>(a, b), r11);
+
+    let a0 = _mm_set_epi64x(0x0000000000000000, 0x8000000000000000u64.cast_signed());
+    let r = _mm_set_epi64x(0x4000000000000000, 0x0000000000000000);
+    assert_eq_m128i(_mm_clmulepi64_si128::<0x00>(a0, a0), r);
+}
+
+#[cfg(target_arch = "x86_64")]
+#[target_feature(enable = "vpclmulqdq")]
+#[cfg(not(jit))]
+unsafe fn test_mm256_clmulepi64_epi128() {
+    let a = _mm256_setr_epi64x(1, 2, 3, 4);
+    let b = _mm256_setr_epi64x(5, 6, 7, 8);
+
+    assert_eq_m256i(_mm256_clmulepi64_epi128::<0x00>(a, b), _mm256_setr_epi64x(5, 0, 9, 0));
+    assert_eq_m256i(_mm256_clmulepi64_epi128::<0x01>(a, b), _mm256_setr_epi64x(10, 0, 28, 0));
+    assert_eq_m256i(_mm256_clmulepi64_epi128::<0x10>(a, b), _mm256_setr_epi64x(6, 0, 24, 0));
+    assert_eq_m256i(_mm256_clmulepi64_epi128::<0x11>(a, b), _mm256_setr_epi64x(12, 0, 32, 0));
+}
+
+#[cfg(target_arch = "x86_64")]
+#[target_feature(enable = "vpclmulqdq,avx512f")]
+#[cfg(not(jit))]
+unsafe fn test_mm512_clmulepi64_epi128() {
+    let a = _mm512_setr_epi64(1, 2, 3, 4, 5, 6, 7, 8);
+    let b = _mm512_setr_epi64(9, 10, 11, 12, 13, 14, 15, 16);
+
+    assert_eq_m512i(
+        _mm512_clmulepi64_epi128::<0x00>(a, b),
+        _mm512_setr_epi64(9, 0, 29, 0, 57, 0, 45, 0),
+    );
+    assert_eq_m512i(
+        _mm512_clmulepi64_epi128::<0x10>(a, b),
+        _mm512_setr_epi64(10, 0, 20, 0, 54, 0, 112, 0),
+    );
+    assert_eq_m512i(
+        _mm512_clmulepi64_epi128::<0x11>(a, b),
+        _mm512_setr_epi64(20, 0, 48, 0, 36, 0, 128, 0),
+    );
+}
+
 #[cfg(target_arch = "x86_64")]
 #[target_feature(enable = "avx2")]
 #[cfg(not(jit))]
diff --git a/compiler/rustc_codegen_cranelift/josh-sync.toml b/compiler/rustc_codegen_cranelift/josh-sync.toml
index 2de9f9489cce3..d8b49ebac131d 100644
--- a/compiler/rustc_codegen_cranelift/josh-sync.toml
+++ b/compiler/rustc_codegen_cranelift/josh-sync.toml
@@ -1,3 +1,4 @@
 repo = "rustc_codegen_cranelift"
 filter = ":~(history=\"keep-trivial-merges,no-splice\")[:rev(<=5e120485964f4857f1ad70f7d661fd244d087668:prefix=compiler/rustc_codegen_cranelift,<=7bd21608dfab11ea536f7be8936cc7dfac5864fb:SQUASH)]:/compiler/rustc_codegen_cranelift"
 filter-version = 2
+pull-mode = "Nightly"
diff --git a/compiler/rustc_codegen_cranelift/patches/0001-stdarch-Disable-SVE.patch b/compiler/rustc_codegen_cranelift/patches/0001-stdarch-Disable-SVE.patch
new file mode 100644
index 0000000000000..e7038699bc998
--- /dev/null
+++ b/compiler/rustc_codegen_cranelift/patches/0001-stdarch-Disable-SVE.patch
@@ -0,0 +1,51 @@
+From e90274ba5bc4bee03a24e8c134ea223497c3a46b Mon Sep 17 00:00:00 2001
+From: Cathal Mullan <contact@cathal.dev>
+Date: Sat, 13 Jun 2026 20:32:02 +0100
+Subject: [PATCH] Disable SVE
+
+Cranelift doesn't support scalable vectors.
+---
+ crates/core_arch/src/aarch64/mod.rs  | 8 ++++----
+ crates/intrinsic-test/src/arm/mod.rs | 1 +
+ 2 files changed, 5 insertions(+), 4 deletions(-)
+
+diff --git a/crates/core_arch/src/aarch64/mod.rs b/crates/core_arch/src/aarch64/mod.rs
+index 34fa5c8..a870e31 100644
+--- a/crates/core_arch/src/aarch64/mod.rs
++++ b/crates/core_arch/src/aarch64/mod.rs
+@@ -19,16 +19,16 @@ mod neon;
+ pub use self::neon::*;
+ 
+ // The rest of `core_arch::aarch64` is available on `arm64ec` but SVE is not supported on `arm64ec`.
+-#[cfg(any(all(target_arch = "aarch64", target_endian = "little"), doc))]
++#[cfg(all(not(test), any(all(target_arch = "aarch64", target_endian = "little"), doc)))]
+ mod sve;
+-#[cfg(any(all(target_arch = "aarch64", target_endian = "little"), doc))]
++#[cfg(all(not(test), any(all(target_arch = "aarch64", target_endian = "little"), doc)))]
+ #[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
+ pub use self::sve::*;
+ 
+ // The rest of `core_arch::aarch64` is available on `arm64ec` but SVE is not supported on `arm64ec`.
+-#[cfg(any(all(target_arch = "aarch64", target_endian = "little"), doc))]
++#[cfg(all(not(test), any(all(target_arch = "aarch64", target_endian = "little"), doc)))]
+ mod sve2;
+-#[cfg(any(all(target_arch = "aarch64", target_endian = "little"), doc))]
++#[cfg(all(not(test), any(all(target_arch = "aarch64", target_endian = "little"), doc)))]
+ #[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
+ pub use self::sve2::*;
+ 
+diff --git a/crates/intrinsic-test/src/arm/mod.rs b/crates/intrinsic-test/src/arm/mod.rs
+index 9c2d0f3..3825f41 100644
+--- a/crates/intrinsic-test/src/arm/mod.rs
++++ b/crates/intrinsic-test/src/arm/mod.rs
+@@ -66,6 +66,7 @@ impl SupportedArchitecture for Arm {
+ 
+         let intrinsics = intrinsics
+             .into_iter()
++            .filter(|i| i.extension != "SVE" && i.extension != "SVE2")
+             // Skip intrinsics that don't return a value.
+             .filter(|i| i.results.kind() != TypeKind::Void)
+             // Skip bfloat intrinsics - not currently supported
+-- 
+2.54.0
+
diff --git a/compiler/rustc_codegen_cranelift/rust-toolchain.toml b/compiler/rustc_codegen_cranelift/rust-toolchain.toml
index d7e313a7a33ed..a6468283e1270 100644
--- a/compiler/rustc_codegen_cranelift/rust-toolchain.toml
+++ b/compiler/rustc_codegen_cranelift/rust-toolchain.toml
@@ -1,4 +1,4 @@
 [toolchain]
-channel = "nightly-2026-09-11"
+channel = "nightly-2026-09-30"
 components = ["rust-src", "rustc-dev", "llvm-tools", "rustfmt"]
 profile = "minimal"
diff --git a/compiler/rustc_codegen_cranelift/scripts/rustup.sh b/compiler/rustc_codegen_cranelift/scripts/rustup.sh
index e26be307328f0..8bd41f98ce550 100755
--- a/compiler/rustc_codegen_cranelift/scripts/rustup.sh
+++ b/compiler/rustc_codegen_cranelift/scripts/rustup.sh
@@ -2,75 +2,34 @@
 
 set -e
 
-TOOLCHAIN=${TOOLCHAIN:-$(date +%Y-%m-%d)}
-
-function check_git_fixed_subtree() {
-    if [[ ! -e ./git-fixed-subtree.sh ]]; then
-        echo "Missing git-fixed-subtree.sh. Please run the following commands to download it:"
-        echo "curl --proto '=https' --tlsv1.2 -sSf https://raw.githubusercontent.com/bjorn3/git/tqc-subtree-portable/contrib/subtree/git-subtree.sh -o git-fixed-subtree.sh"
-        echo "chmod u+x git-fixed-subtree.sh"
-        exit 1
-    fi
-    if [[ ! -x ./git-fixed-subtree.sh ]]; then
-        echo "git-fixed-subtree.sh is not executable. Please run the following command to make it executable:"
-        echo "chmod u+x git-fixed-subtree.sh"
-        exit 1
-    fi
-}
+export GIT_CONFIG_GLOBAL=$(pwd)/../rust/josh.gitconfig
+export RUSTC_GIT=../rust
 
 case $1 in
     "prepare")
-        echo "=> Installing new nightly"
-        rustup toolchain install --profile minimal "nightly-${TOOLCHAIN}" # Sanity check to see if the nightly exists
-        sed -i "s/\"nightly-.*\"/\"nightly-${TOOLCHAIN}\"/" rust-toolchain.toml
-
         echo "=> Uninstalling all old nightlies"
-        for nightly in $(rustup toolchain list | grep nightly | grep -v "$TOOLCHAIN" | grep -v nightly-x86_64); do
+        for nightly in $(RUSTUP_AUTO_INSTALL=0 rustup toolchain list | grep nightly | grep -v nightly-x86_64); do
             rustup toolchain uninstall "$nightly"
         done
 
+        echo "=> Installing new nightly"
+        rustup toolchain install
+
         ./clean_all.sh
 
         ./y.sh prepare
         ;;
-    "commit")
-        git add rust-toolchain.toml
-        git commit -m "Rustup to $(rustc -V)"
-        ;;
     "push")
-        check_git_fixed_subtree
-
-        cg_clif=$(pwd)
-        pushd ../rust
-        git pull origin main
+        username=${2:-bjorn3}
         branch=sync_cg_clif-$(date +%Y-%m-%d)
-        git checkout -b "$branch"
-        "$cg_clif/git-fixed-subtree.sh" pull --prefix=compiler/rustc_codegen_cranelift/ https://github.com/rust-lang/rustc_codegen_cranelift.git main
-        git push -u my "$branch"
-
-        # immediately merge the merge commit into cg_clif to prevent merge conflicts when syncing
-        # from rust-lang/rust later
-        "$cg_clif/git-fixed-subtree.sh" push --prefix=compiler/rustc_codegen_cranelift/ "$cg_clif" sync_from_rust
-        popd
-        git merge sync_from_rust
+        rustc-josh-sync push "$branch" "$username"
 	;;
     "pull")
-        check_git_fixed_subtree
-
-        RUST_VERS=$(curl "https://static.rust-lang.org/dist/$TOOLCHAIN/channel-rust-nightly-git-commit-hash.txt")
-        echo "Pulling $RUST_VERS ($TOOLCHAIN)"
-
-        cg_clif=$(pwd)
-        pushd ../rust
-        git fetch origin main
-        git -c advice.detachedHead=false checkout "$RUST_VERS"
-        "$cg_clif/git-fixed-subtree.sh" push --prefix=compiler/rustc_codegen_cranelift/ "$cg_clif" sync_from_rust
-        popd
-        git merge sync_from_rust -m "Sync from rust $RUST_VERS"
-        git branch -d sync_from_rust
+        git checkout -b sync_from_rust
+        rustc-josh-sync pull
         ;;
     *)
         echo "Unknown command '$1'"
-        echo "Usage: ./rustup.sh prepare|commit"
+        echo "Usage: ./rustup.sh prepare|pull|push [fork]"
         ;;
 esac
diff --git a/compiler/rustc_codegen_cranelift/scripts/test_rustc_tests.sh b/compiler/rustc_codegen_cranelift/scripts/test_rustc_tests.sh
index 5a1374fe56e09..648f68588e04b 100755
--- a/compiler/rustc_codegen_cranelift/scripts/test_rustc_tests.sh
+++ b/compiler/rustc_codegen_cranelift/scripts/test_rustc_tests.sh
@@ -164,6 +164,7 @@ rm -r tests/run-make/const-trait-stable-toolchain # same
 rm -r tests/run-make/print-request-help-stable-unstable # same
 rm -r tests/run-make/issue-149402-suggest-unresolve # same
 rm -r tests/run-make/const-destruct-stable-toolchain # same
+rm -r tests/run-make/unstable-target-feature # same
 rm -r tests/run-make/incr-add-rust-src-component
 rm tests/ui/errors/remap-path-prefix-sysroot.rs # different sysroot source path
 rm -r tests/run-make/export # something about rustc version mismatches
diff --git a/compiler/rustc_codegen_cranelift/src/compiler_builtins.rs b/compiler/rustc_codegen_cranelift/src/compiler_builtins.rs
index ca9157daae584..8e339167a5b12 100644
--- a/compiler/rustc_codegen_cranelift/src/compiler_builtins.rs
+++ b/compiler/rustc_codegen_cranelift/src/compiler_builtins.rs
@@ -135,8 +135,8 @@ builtin_functions! {
     // float intrinsics
     fn __powisf2(a: f32, b: i32) -> f32;
     fn __powidf2(a: f64, b: i32) -> f64;
-    // FIXME(f16_f128): `compiler-builtins` doesn't currently support `__powitf2` on MSVC.
-    // fn __powitf2(a: f128, b: i32) -> f128;
+    #[cfg(not(all(target_os = "windows", target_env = "gnu")))]
+    fn __powitf2(a: f128, b: i32) -> f128;
     fn powf(a: f32, b: f32) -> f32;
     fn pow(a: f64, b: f64) -> f64;
     fn expf(f: f32) -> f32;
diff --git a/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_x86.rs b/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_x86.rs
index 136e98964bc35..f3763b5895eba 100644
--- a/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_x86.rs
+++ b/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_x86.rs
@@ -855,42 +855,59 @@ pub(super) fn codegen_x86_llvm_intrinsic_call<'tcx>(
             );
         }
 
-        "llvm.x86.pclmulqdq" => {
+        "llvm.x86.pclmulqdq" | "llvm.x86.pclmulqdq.256" | "llvm.x86.pclmulqdq.512" => {
             // https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_clmulepi64_si128&ig_expand=772
+            // https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_clmulepi64_epi128&ig_expand=752
+            // https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_clmulepi64_epi128&ig_expand=753
             intrinsic_args!(fx, args => (a, b, _imm8); intrinsic);
 
-            let a = a.load_scalar(fx);
-            let b = b.load_scalar(fx);
+            let (lane_count, intrinsic_name) = match intrinsic {
+                "llvm.x86.pclmulqdq" => (1, "_mm_clmulepi64_si128"),
+                "llvm.x86.pclmulqdq.256" => (2, "_mm256_clmulepi64_epi128"),
+                "llvm.x86.pclmulqdq.512" => (4, "_mm512_clmulepi64_epi128"),
+                _ => unreachable!(),
+            };
 
-            let imm8 =
-                if let Some(imm8) = crate::constant::mir_operand_get_const_val(fx, &args[2].node) {
-                    imm8
-                } else {
-                    fx.tcx.dcx().span_fatal(
-                        span,
-                        "Index argument for `_mm_clmulepi64_si128` is not a constant",
-                    );
-                };
+            let Some(imm8) = crate::constant::mir_operand_get_const_val(fx, &args[2].node) else {
+                fx.tcx.dcx().span_fatal(
+                    span,
+                    format!("Index argument for `{intrinsic_name}` is not a constant"),
+                )
+            };
 
             let imm8 = imm8.to_u8();
 
-            codegen_inline_asm_inner(
-                fx,
-                &[InlineAsmTemplatePiece::String(format!("pclmulqdq xmm0, xmm1, {imm8}").into())],
-                &[
-                    CInlineAsmOperand::InOut {
-                        reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm0)),
-                        _late: true,
-                        in_value: a,
-                        out_place: Some(ret),
-                    },
-                    CInlineAsmOperand::In {
-                        reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm1)),
-                        value: b,
-                    },
-                ],
-                InlineAsmOptions::NOSTACK | InlineAsmOptions::PURE | InlineAsmOptions::NOMEM,
-            );
+            // Cranelift does not currently support 256-bit or 512-bit SSA values, so we use the
+            // 128-bit instruction on each 128-bit lane.
+            for lane in 0..lane_count {
+                let a = a.value_typed_lane(fx, fx.tcx.types.u128, lane).load_scalar(fx);
+                let b = b.value_typed_lane(fx, fx.tcx.types.u128, lane).load_scalar(fx);
+                let ret_lane = ret.place_typed_lane(fx, fx.tcx.types.u128, lane);
+
+                codegen_inline_asm_inner(
+                    fx,
+                    &[InlineAsmTemplatePiece::String(
+                        format!("pclmulqdq xmm0, xmm1, {imm8}").into(),
+                    )],
+                    &[
+                        CInlineAsmOperand::InOut {
+                            reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(
+                                X86InlineAsmReg::xmm0,
+                            )),
+                            _late: true,
+                            in_value: a,
+                            out_place: Some(ret_lane),
+                        },
+                        CInlineAsmOperand::In {
+                            reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(
+                                X86InlineAsmReg::xmm1,
+                            )),
+                            value: b,
+                        },
+                    ],
+                    InlineAsmOptions::NOSTACK | InlineAsmOptions::PURE | InlineAsmOptions::NOMEM,
+                );
+            }
         }
 
         "llvm.x86.aesni.aeskeygenassist" => {