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hip: accept gfx1010 and gfx1011 (RDNA1) in the arch gate - #1142

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AcckiyGerman:f-hip-rdna1-gfx1010-gfx1011-v2
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AcckiyGerman wants to merge 1 commit into
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AcckiyGerman:f-hip-rdna1-gfx1010-gfx1011-v2

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@AcckiyGerman

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Reopens #996 on the new main (it was closed by the history cleanup, as your comment described). One commit, cherry-picked onto upstream/main; the only conflict was the arch list line, which now keeps gfx1034 and gfx1151 alongside the new entries.

Adds gfx1010 and gfx1011 to _strata_hip_unvalidated. No source changes are needed.

gfx1010 (Navi 10) — tested. RX 5700 XT 8 GB, Ryzen 5 7600X, 30 GB RAM, Ubuntu 26.04, ROCm 7.14.0a20260612 (gfx101X-dgpu wheels), Coder IQ1_M, 32,768-token context, --mmap-experts --vram-reserve-mib 1024 --spec 4. Official community benchmark script, greedy, 256 output tokens, 3 runs, medians:

prompt tokens prompt tok/s decode tok/s TTFT
4,096 115.4 18.0 35.5 s
16,384 144.3 20.3 113.6 s
30,000 149.0 23.3 201.4 s

61 of 61 ctest pass on the card, 6 of 6 tools/needle_bench.py checks at 8k and 30k. The card holds 607 of the model's 12,288 experts (profile-prefilled), decode cache hit 31%.

gfx1011 (Navi 12, Radeon PRO V520 / Pro 5600M) — untested on hardware. Same RDNA1 ISA, builds with 0 errors on the same wheels.

Two facts the arch list can't carry: hipBLASLt 1.4.0 refuses all 26 prefill GEMM shapes on gfx1010 (heuristic_count = 0), so there is no tuning table; and with an AMD iGPU in the box hsa_init segfaults enumerating the pair - below HIP, so HIP_VISIBLE_DEVICES cannot reach it - and the engine needs ROCR_VISIBLE_DEVICES naming one KFD node. The #442 SDWA dp4a turned out not to be needed: portable 162.7/24.3, SDWA 158.3/24.0, 16/16 HIP tests on the portable build.

The full report directory is ready if you want it under bench/results/.

gfx1010 (Navi 10) is measured on an RX 5700 XT: 8 GB card, Coder IQ1_M, 32K
context, prompt 115 / 144 / 149 tok/s and decode 18.0 / 20.3 / 23.3 tok/s at 4K /
16K / 30K prompt tokens, 6 of 6 needle checks at 8K and 30K, 61 of 61 ctest on the
card. Nothing beyond the arch list is needed: the portable scalar dp4a that main
falls to measured 162.7 / 24.3 against 158.3 / 24.0 with the __gfx1012__ SDWA
control (Niko1221#442) - inside the run-to-run spread - and 16 of 16 HIP tests pass on it.

gfx1011 (Navi 12) is untested on hardware: same RDNA1 ISA, builds with 0 errors on
ROCm 7.14's gfx101X-dgpu wheels.

Two box facts, for whoever picks this up: hipBLASLt 1.4.0 refuses all 26 of the
engine's GEMM shapes on gfx1010 (heuristic_count = 0), so there is no tuning table
and prompts run on plain hipBLAS; and in a PC that also has an AMD iGPU, ROCm's HSA
runtime segfaults in GpuAgent::InitDma while enumerating the pair - below HIP, so
HIP_VISIBLE_DEVICES cannot reach it - and the engine must start with
ROCR_VISIBLE_DEVICES naming the one KFD node (rocminfo for the index).

Co-Authored-By: Qwen3.8-Flash-Next <noreply@qwen.ai>
@Niko1221

Niko1221 commented Oct 7, 2026

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Thank you. The change in this PR is already in 0.1.40.2 as a port of the original PR with authorship kept, so this re-file is closed as a duplicate of that port.

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