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[TIRx] Add a dedicated boolean buffer lowering pass#19873

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tlopex merged 3 commits into
apache:mainfrom
guan404ming:tirx-lower-bool-buffer
Jul 1, 2026
Merged

[TIRx] Add a dedicated boolean buffer lowering pass#19873
tlopex merged 3 commits into
apache:mainfrom
guan404ming:tirx-lower-bool-buffer

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@guan404ming

@guan404ming guan404ming commented Jun 23, 2026

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Why

The bool→int8 backing-array conversion was duplicated inline across FlattenBuffer and LowerTIRxCleanup.

How

  • Add LowerBoolBuffer pass that rewrites bool buffers to int8 and inserts load/store casts.
  • Remove the duplicated bool handling from FlattenBuffer and LowerTIRxCleanup.
  • Run it after FlattenBuffer (before VectorizeLoop) in every pipeline, with structural and build-and-run tests.

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Code Review

This pull request introduces a dedicated LowerBoolBuffer pass to replace boolean buffers with an int8 backing array, moving this logic out of FlattenBuffer and LayoutApplier. The new pass is integrated into the compilation pipelines to run after buffer flattening and before loop vectorization. Feedback on the changes suggests handling SBlockNode within the BoolBufferLegalizer to properly remap boolean buffers referenced or allocated inside blocks. Additionally, it is recommended to use new_buf->dtype instead of hardcoding DataType::Int(8) during load and store casts to improve code robustness.

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Comment thread src/tirx/transform/lower_bool_buffer.cc Outdated
Comment thread src/tirx/transform/lower_bool_buffer.cc Outdated
Comment thread src/tirx/transform/lower_bool_buffer.cc Outdated
@tqchen

tqchen commented Jun 23, 2026

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actually i am not sure if bool to int8 lowering is still needed given we migrated into DLPack bool recently and now bool is native bool(8bit), cc @tlopex

@guan404ming guan404ming force-pushed the tirx-lower-bool-buffer branch 5 times, most recently from 8da0ec3 to e6a6bcd Compare June 26, 2026 16:19
@guan404ming

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Thanks @tqchen for catching this. Just confirmed it's dead code. With native DLPack bool(8-bit), LLVM lowers bool to byte-addressable i1 and CUDA emits native bool, so the int8 backing isn't needed. Verified end-to-end on LLVM CPU and CUDA L4: bool alloc buffers + load/store + compare/select all pass with the conversion removed. I have updated this PR to just delete the bool→int8 lowering instead of adding the pass.

@guan404ming guan404ming force-pushed the tirx-lower-bool-buffer branch from e6a6bcd to 315cc5f Compare June 29, 2026 05:03
Comment thread src/target/llvm/codegen_llvm.cc Outdated

// Bool tensors are backed by int8 so vectorized accesses lower to real loads/stores
// (ld1b/st1b) instead of the i1 predicate registers that an i1 type would force.
PrimType BoolStorageType(const PrimType& dtype) {

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The name sounds it only works for Bool, instead, i think it is betetr to say BufferAccessType

and comment as the underlying access type for Buffer

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Thanks for the great suggestion and I just updated.

Signed-off-by: Guan-Ming (Wesley) Chiu <105915352+guan404ming@users.noreply.github.com>
Signed-off-by: Guan-Ming (Wesley) Chiu <105915352+guan404ming@users.noreply.github.com>
@guan404ming guan404ming force-pushed the tirx-lower-bool-buffer branch from 315cc5f to 2136eb5 Compare June 30, 2026 15:43
@tlopex tlopex merged commit bb75001 into apache:main Jul 1, 2026
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3 participants