Issues

• Bug Report: SC to an address with no device retires with failure instead of raising a store access fault

  bluespec/Piccolo#68 · Filter by author hakunahmattatah opened on Nov 9, 2026

• Bug Report: FMIN and FMAX return a quiet NaN payload instead of the canonical NaN

  bluespec/Piccolo#67 · Filter by author hakunahmattatah opened on Nov 9, 2026

• Bug Report: FMADD and FMSUB with rs3 f20 or f28 write the integer register instead of the floating point register

  bluespec/Piccolo#66 · Filter by author hakunahmattatah opened on Nov 9, 2026

• Bug Report: allows S-mode instruction fetches from U pages when SUM=1

  bluespec/Piccolo#65 · Filter by author obscurus41 opened on Nov 9, 2026

• Bug Report: reports store/AMO address-misaligned for a misaligned LR

  bluespec/Piccolo#64 · Filter by author obscurus41 opened on Nov 9, 2026

• Potential Bug Report: Reserved OP funct7 encoding bypasses Piccolo’s must-be-zero check

  bluespec/Piccolo#63 · Filter by author obscurus41 opened on Nov 9, 2026

• Bug Report: traps on standard compressed HINT encodings

  bluespec/Piccolo#62 · Filter by author obscurus41 opened on Nov 9, 2026

• Bug Report: traps on FENCE and FENCE.I with nonzero reserved fields

  bluespec/Piccolo#61 · Filter by author obscurus41 opened on Nov 9, 2026

• Bug Report: leaves mstatus.MPRV set after MRET or SRET returns below M-mode

  bluespec/Piccolo#60 · Filter by author obscurus41 opened on Nov 9, 2026

• Bug Report: retains nonzero mstatus.WPRI and VS fields

  bluespec/Piccolo#59 · Filter by author obscurus41 opened on Nov 9, 2026

• Bug Report: exposes nondelegated interrupt bits in sie and sip

  bluespec/Piccolo#58 · Filter by author obscurus41 opened on Nov 9, 2026

• Bug Report: ignores writes to mcycle and mcycleh

  bluespec/Piccolo#57 · Filter by author obscurus41 opened on Nov 9, 2026

• Bug Report: does not enforce mcounteren when lower-privilege modes read counters

  bluespec/Piccolo#56 · Filter by author obscurus41 opened on Nov 9, 2026

• Bug Report: M-mode satp access incorrectly traps when mstatus.TVM is set

  bluespec/Piccolo#55 · Filter by author obscurus41 opened on Nov 9, 2026

• Bug Report: floating-point CSR access when mstatus.FS is Off

  bluespec/Piccolo#54 · Filter by author obscurus41 opened on Nov 9, 2026

• Bug Report: CSRRS/CSRRC with nonzero rs1 holding zero does not trap on read-only CSRs

  bluespec/Piccolo#53 · Filter by author obscurus41 opened on Nov 8, 2026

• Bug Report: the instruction start in mtval when the second parcel faults

  bluespec/Piccolo#52 · Filter by author obscurus41 opened on Nov 8, 2026

• Bug Report: software writes to mip.SEIP when the external-interrupt input is low

  bluespec/Piccolo#51 · Filter by author obscurus41 opened on Nov 8, 2026

• Bug Report: takes a delegated S-mode interrupt before a pending M-mode interrupt

  bluespec/Piccolo#50 · Filter by author obscurus41 opened on Nov 8, 2026

• Bug Report: timeh read completes without a trap while time traps

  bluespec/Piccolo#49 · Filter by author obscurus41 opened on Nov 5, 2026

• Bug Report: mstatus SUM, MXR, TVM, and TSR are writable without S-mode

  bluespec/Piccolo#48 · Filter by author obscurus41 opened on Nov 5, 2026

• SC to an I/O address fails but leaves the LR reservation valid

  bluespec/Piccolo#47 · Filter by author harrypotter84923 opened on Nov 5, 2026

• Bug report: AMO to an I/O address at 4 mod 8 operates on the wrong half of the bus word

  bluespec/Piccolo#46 · Filter by author harrypotter84923 opened on Nov 5, 2026

• Bug report: C.FLD raises illegal-instruction on RV32 with D, while C.FSD, C.FLDSP and C.FSDSP execute

  bluespec/Piccolo#45 · Filter by author harrypotter84923 opened on Nov 5, 2026

• relocation truncated error when compiling elf_to_hex.c file to create the Mem Hex files

  bluespec/Piccolo#44 · Filter by author jrmejiaa opened on Mar 28, 2023
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