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metal : gate mul_mm_id src1 rescale behind ggml_prec - #29029
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Assisted-by: Claude Fable 5.1
ggerganov
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Thanks! We expect some backends to fail the new tests now - let's see.
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@mdegans We should now update the @ggml-org/ggml-cuda @ggml-org/ggml-vulkan @ggml-org/ggml-webgpu fyi |
I will take care of that tomorrow, no problem. |
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I was already looking into this for Vulkan, will open a PR soon. |
I was about to tackle this but will hold off in this case. @ggerganov and @0cc4m please let me know which bits you want me to handle, if any. |
Will do tomorrow along with the rest of the backends unless anybody objects by then. |
You can update supports_op here for failing cases, I'll open a follow-up PR with fixes for Vulkan. |
Will do. Cherry picking WebGPU as asked and fixing |
fix `supports_op` to return false for failing backends when the specified src1 precision is f32 Assisted-by: Claude Fable 5.1
FYI, Intel CIs are down ATM. |
Thanks for the heads-up but I had not looked at the causes of the failures on Intel. I think they're unrelated. So it's fine even if it runs now. Vulkan passes locally on macOS and Linux. CUDA passes on Linux. WebGPU I am assuming is workign based on @yomaytk but I will run locally as well to confirm. Edit: Confirmed on macOS. |
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
* metal : gate mul_mm_id src1 rescale behind ggml_prec Assisted-by: Claude Fable 5.1 * ggml-webgpu: reject MUL_MAT_ID when src1 precision is F32 * cuda/vulkan: reject MUL_MAT_ID in supports_op when src1 prec is F32 fix `supports_op` to return false for failing backends when the specified src1 precision is f32 Assisted-by: Claude Fable 5.1 --------- Co-authored-by: yomaytk <yoshimura.masashi.frbs@gmail.com>
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
* metal : gate mul_mm_id src1 rescale behind ggml_prec Assisted-by: Claude Fable 5.1 * ggml-webgpu: reject MUL_MAT_ID when src1 precision is F32 * cuda/vulkan: reject MUL_MAT_ID in supports_op when src1 prec is F32 fix `supports_op` to return false for failing backends when the specified src1 precision is f32 Assisted-by: Claude Fable 5.1 --------- Co-authored-by: yomaytk <yoshimura.masashi.frbs@gmail.com>
* metal : gate mul_mm_id src1 rescale behind ggml_prec Assisted-by: Claude Fable 5.1 * ggml-webgpu: reject MUL_MAT_ID when src1 precision is F32 * cuda/vulkan: reject MUL_MAT_ID in supports_op when src1 prec is F32 fix `supports_op` to return false for failing backends when the specified src1 precision is f32 Assisted-by: Claude Fable 5.1 --------- Co-authored-by: yomaytk <yoshimura.masashi.frbs@gmail.com> (cherry picked from commit 0f8a414)
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
* metal : gate mul_mm_id src1 rescale behind ggml_prec Assisted-by: Claude Fable 5.1 * ggml-webgpu: reject MUL_MAT_ID when src1 precision is F32 * cuda/vulkan: reject MUL_MAT_ID in supports_op when src1 prec is F32 fix `supports_op` to return false for failing backends when the specified src1 precision is f32 Assisted-by: Claude Fable 5.1 --------- Co-authored-by: yomaytk <yoshimura.masashi.frbs@gmail.com> (cherry picked from commit 0f8a414)
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Same supports_op gate CUDA, Vulkan and WebGPU got in ggml-org#29029: SYCL quantizes src1 to q8_1 or converts it to f16, so activations beyond the f16 range turn into NaN (MUL_MAT_ID q8_0 n_mats=8 n_used=2 n=64 amax=1e5). Assisted-by: Claude Opus 5.5
Overview
This is a follow-up to #26223 per request from @ggerganov to use ggml_prec....
Details
master4ff829e against this branch, eight passes in ABBA BAAB order, median of per-case medians, negative means this branch is faster.Please note that N >= 1024 are local cases only and not committed.
Additional information
which will likely break on CUDA, Vulkan and WebGPU(now likely fixed).Let me know if these should be commented out. My guess is they should be, but that putting the test change in a seperate commit might be desirable. Please advise.Requirements