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Port of the HC_POST_GATE fusion to the Metal backend. the new GGML_METAL_FUSION_HC_POST_GATE pattern folds the gate chain into the DSV4_HC_POST kernel: it reads the raw post weights and applies gate_scale_out*sigmoid(gate_scale_in*p), so the chain runs as one kernel instead of four. Assisted-by: pi:llama.cpp/ggml-org/MiMo-V2.6-Flash-MOPD-GGUF (2x Strix Halo (Ethernet, PP=2))
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Overview
Port of the HC_POST_GATE fusion to the Metal backend (#30602 on CUDA, #29520 on Vulkan). ggml_metal_fusion_check_hc_post_gate matches SCALE -> SIGMOID -> SCALE -> DSV4_HC_POST feeding hc_post->src[2]; the hc_post kernels apply gate_scale_outsigmoid(scale_inp) to the raw weights, so the chain runs as one kernel instead of four.
Worth ~1.1% TG on M2 Ultra on Qwen3.8-Flash-Next IQ4_NL.
Requirements
pi:llama.cpp2x Strix Halo (Ethernet, PP=2)◷ 2.2h · ↑ 124k · ↓ 85k · ≡ 294 · ⌨ 4