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treewide: Move all tools to OSEDA 2026.09 - #352
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DanielKellerM
marked this pull request as draft
October 2, 2026 09:45
The operand mux wrote op[i] and then read it back to replicate it, and its default arm assigned op[i] to itself. Verilator 5.052 hits an internal error in its scoped DFG pass on this (V3Dfg.h: Replacing DfgVertex with itself). Select the operand into op_sel and replicate it in a separate process. No functional change.
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DanielKellerM
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October 3, 2026 04:15
The yosys-slang frontend of OSEDA 2026.02 (Yosys 0.62) is quadratic on loop-assigned unpacked arrays. The latch SCM register files alone take 31 of its 35 min, which pushes the internal Yosys job past 4 h. The sv-elab frontend of 2026.09 (Yosys 0.69) elaborates the cluster in 2.5 min. It drops --ignore-unknown-modules (the design has none) and --compat-mode has no effect anymore. Verilator (5.052) and slang move along. Bender moves to 0.32.1, the version OSEDA 2026.09 ships: the Docker image takes it from OSEDA, the IIS setup uses the bender-0.32.1 wrapper, which keeps SN_BENDER a single command for its Tcl consumers.
Script-only changes did not rerun Yosys, so CI skipped the job on them (e.g. on main after pulp-platform#345).
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Since Verilator 5.050 the FST writer (fstcpp) includes lz4.h and links -llz4, so building the traced model in hw-builder needs liblz4-dev. The OSEDA image only ships the liblz4-1 runtime.
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Moves every tool to one OSEDA version, 2026.09, both locally (
iis-setup.sh) and in the Docker image: Verilator 5.044 -> 5.052, Yosys 0.62 -> 0.69, slang 10.0 -> 11.0, bender 0.31.0 -> 0.32.1. Locally bender comes from the IISbender-0.32.1command, in Docker from OSEDA; both are 0.32.1.This fixes the internal Yosys job, which has been running out of time (4 h) since #345 and #350. The old Yosys frontend was extremely slow on the latch-based register files; with the new one the whole Yosys run takes about half the time, with the same memory and area within 0.2%.
Two other changes:
snitch_fp_ss. The operand is now picked first and copied across the lanes in a separate step. It behaves exactly the same.Verified internally:
snitch_fp_sschange proven identical to the old code with two independent formal equivalence checks, for every config used in CIsnitch_fp_ssgive bit-identical traces on 157 tests in Questa and Verilator