mm256_srli,slli_si256; mm256_bsrli,bslli_epi128 to const generics

[minybot]

f16c: _mm256_cvtps_ph; mm_cvtps_ph

[rust-highfive]

r? @Amanieu

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[minybot]

At f16c.rs
_mm256_cvtps_ph(a: __m256, imm_rounding: i32). The current imm_rounding is set to 0-7.
I checked the Clang, it accepts 0-255.
Any suggestion?

[Amanieu]

The instruction definition here says that bits 3 to 7 are ignored by the CPU. I think to be safe we should only allow imm3, we can always relax it later if necessary.

[minybot]

The instruction definition here says that bits 3 to 7 are ignored by the CPU. I think to be safe we should only allow imm3, we can always relax it later if necessary.
Ok. I will finish f16c.

[lqd]

I'm still wondering about the fact that we "* 8" the immediates that are supposed to be in bytes and <= 16 for the shifts

[Amanieu]

It might be better to switch the implementation to use a shuffle like clang does and like we already do for _mm_slli_si128.

[minybot]

It might be better to switch the implementation to use a shuffle like clang does and like we already do for _mm_slli_si128.
Ok. I will modify it to similar to _mm_slli_si128.

[minybot]

It might be better to switch the implementation to use a shuffle like clang does and like we already do for _mm_slli_si128.

It seems mm256_slli_si256 = mm256_bslli_epi128?

[Amanieu]

Yes, see #1012.

[Amanieu]

Deleted commented code.

[Amanieu]

You can just call _mm256_bslli_epi128 here.

[Amanieu]

You can just call _mm256_bsrli_epi128 here.

[minybot]

Yes, see #1012.

Thanks. I think my bsrli_epi128 and bslli_epi128 having problems. I need to check them first.