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fix(riscv64/qemu-aia): fix zone1 memory layout in virtio configs - #411

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peikachu wants to merge 1 commit into
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peikachu:fix/riscv-qemu-aia-virtio-config
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peikachu wants to merge 1 commit into
syswonder:devfrom
peikachu:fix/riscv-qemu-aia-virtio-config

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Summary

Align zone1's memory layout in zone1-linux-virtio.json and virtio-backend.json on qemu-aia with zone1-linux.dts and zone1-linux-passthrough.json:

  • zone1 RAM: 0x83000000/0x0C000000 → 0x85000000/0x0A000000
  • kernel/entry: 0x84000000 → 0x86000000; dtb: 0x83000000 → 0x85000000
  • backend zone0_ipa/zonex_ipa/size updated to match

Motivation

0x80000000~0x85000000 is reserved for OpenSBI and hvisor, so zone0 has no stage-2 mapping for it. hvisor zone start copies the kernel into this range, which traps into hvisor. hvisor then tries to decode the instruction as MMIO and panics because it is a vector store (trap instruction is not Load or Store, inst 0x02050027). Even without the panic, a kernel at 0x84000000 would lie outside the memory@85000000 node in zone1's dtb.

The new layout is the same as zone1-linux-passthrough.json: dtb at the start of RAM (0x85000000), kernel at 0x86000000. This range is inside zone0's RAM, so zone0 can mmap it to load the kernel and serve the virtqueues.

Verification

On riscv64/qemu-aia (Linux 6.13 for zone0 and zone1): started zone1 with zone1-linux-virtio.json plus the virtio backend. zone1 booted to a shell, and hvisor reported no ERROR.

@github-actions github-actions Bot added bug Something isn't working riscv64 labels Oct 28, 2026
@peikachu peikachu closed this Oct 28, 2026
@peikachu peikachu reopened this Oct 28, 2026
@github-actions github-actions Bot added riscv64 and removed riscv64 labels Oct 28, 2026
@peikachu
peikachu force-pushed the fix/riscv-qemu-aia-virtio-config branch from 68626dd to 1c10695 Compare October 28, 2026 07:23
@github-actions github-actions Bot added riscv64 and removed riscv64 labels Oct 28, 2026
@li041
li041 requested review from li041 and liulog October 29, 2026 07:23
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