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callconv: mips64: Match GCC for alignment of 16-byte scalars - #163653
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Previously, the calling convention code would not register align 16-byte scalars to even/odd register pairs. It seems like GCC does not differentiate between integer and floating point scalars when calculating whether a scalar is aligned. To our understanding, the MIPS n64 ABI [1] would require doing so for integer and floating point parameters respectively [2], but GCC violates the specification here and will happily pass an f128 in an odd-even floating point register pair and therefore sometimes shift following integer arguments due to unnecessary (if the spec is to be believed) inserted integer padding. [1]: https://web.archive.org/web/20160121005457/http://techpubs.sgi.com/library/manuals/2000/007-2816-005/pdf/007-2816-005.pdf#page=20 [2]: "This requires that they be passed in even-odd floating point register pairs, even if doing so requires skipping a register parameter"
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I've confirmed that this change is consistent with GCC and Clang 24 on both mips64 and mips64el
@bors r+ rollup
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…r=folkertdev callconv: mips64: Match GCC for alignment of 16-byte scalars Previously, the calling convention code would not register align 16-byte scalars to even/odd register pairs. It seems like GCC does not differentiate between integer and floating point scalars when calculating whether a scalar is aligned. To our understanding, the MIPS n64 ABI [^1] would require doing so for integer and floating point parameters respectively [^2], but GCC violates the specification here and will happily pass an f128 in an odd-even floating point register pair and therefore sometimes shift following integer arguments due to unnecessary (if the spec is to be believed) inserted integer padding. [^1]: https://web.archive.org/web/20160121005457/http://techpubs.sgi.com/library/manuals/2000/007-2816-005/pdf/007-2816-005.pdf#page=20 [^2]: "This requires that they be passed in even-odd floating point register pairs, even if doing so requires skipping a register parameter" Fixes #161679 r? folkertdev cc @beetrees
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…uwer Rollup of 6 pull requests Successful merges: - #161491 (Rip out old solver coherence) - #163223 (regression test for async handler normalization ICE) - #163653 (callconv: mips64: Match GCC for alignment of 16-byte scalars) - #163742 (Add the `movdir64b` and `movdiri` x86 target features) - #163752 (Revert "implement PartialEq<VecDeque<U>> for Vec<T>, &[T], &mut [T], [T; N], &[T; N] and &mut [T; N]") - #163755 (fix -Z track-diagnostics for errors and lints emitted from rustc_attr_parsing)
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…uwer Rollup of 9 pull requests Successful merges: - #161491 (Rip out old solver coherence) - #163533 (Run cg_gcc tests with the correct compiler) - #163223 (regression test for async handler normalization ICE) - #163367 (simplify rustc_log a bit) - #163622 (x86: c-variadic functions don't use registers with `-Zregparm`) - #163653 (callconv: mips64: Match GCC for alignment of 16-byte scalars) - #163665 (Parser: Refactor & better document `should_continue_as_assoc_expr` & `can_continue_expr_unambiguously`) - #163742 (Add the `movdir64b` and `movdiri` x86 target features) - #163752 (Revert "implement PartialEq<VecDeque<U>> for Vec<T>, &[T], &mut [T], [T; N], &[T; N] and &mut [T; N]")
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Rollup merge of #163653 - Gelbpunkt:mips64-16-byte-scalar-alignment, r=folkertdev callconv: mips64: Match GCC for alignment of 16-byte scalars Previously, the calling convention code would not register align 16-byte scalars to even/odd register pairs. It seems like GCC does not differentiate between integer and floating point scalars when calculating whether a scalar is aligned. To our understanding, the MIPS n64 ABI [^1] would require doing so for integer and floating point parameters respectively [^2], but GCC violates the specification here and will happily pass an f128 in an odd-even floating point register pair and therefore sometimes shift following integer arguments due to unnecessary (if the spec is to be believed) inserted integer padding. [^1]: https://web.archive.org/web/20160121005457/http://techpubs.sgi.com/library/manuals/2000/007-2816-005/pdf/007-2816-005.pdf#page=20 [^2]: "This requires that they be passed in even-odd floating point register pairs, even if doing so requires skipping a register parameter" Fixes #161679 r? folkertdev cc @beetrees
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Previously, the calling convention code would not register align 16-byte scalars to even/odd register pairs.
It seems like GCC does not differentiate between integer and floating point scalars when calculating whether a scalar is aligned. To our understanding, the MIPS n64 ABI 1 would require doing so for integer and floating point parameters respectively 2, but GCC violates the specification here and will happily pass an f128 in an odd-even floating point register pair and therefore sometimes shift following integer arguments due to unnecessary (if the spec is to be believed) inserted integer padding.
Fixes #161679
r? folkertdev
cc @beetrees
Footnotes
https://web.archive.org/web/20160121005457/http://techpubs.sgi.com/library/manuals/2000/007-2816-005/pdf/007-2816-005.pdf#page=20 ↩
"This requires that they be passed in even-odd floating point register pairs, even if doing so requires skipping a register parameter" ↩